- Salary
- $106k – $156k
- Location
- Markham, Ontario, Canada
- Workplace
- Onsite
- Type
- Contract
- Department
- Heterogeneous Compiler Lab
- Seniority
- Mid
- Experience
- 5+ years
- Education
- PhD
- Source
- Recruitee
Description
Huawei Canada has an immediate 12-month contract opening for a Technology Planning Engineer.
About the team:
The Heterogeneous Compiler Lab, led by esteemed technical experts with extensive industry and academic experience, publishes innovative research at leading conferences. Recognized as key contributors to the LLVM Compiler Infrastructure project, this lab excels in developing diversified IP compiler collaborations, focusing on AI, GPU, and CPU architectures. Our efforts include heterogeneous compilation technology and SW-HW co-design, optimizing for AI, graphics, games, and mobile applications while tackling technological challenges through open-source community.
About the job:
Develop technical insights through in-depth study of state of art literature and participating internal discussions.
Attend academic or industry conference to get the latest information and insight report, like NeurIPS/ICLR/ICML/MLSys/CGO/MICRO/OSDI etc…
As a technical individual contributor, you are responsible for understanding and defining technology research frontiers and opportunities that will have significant impacts to the industry and Huawei’s business in mid-term and long-term.
Develop technology development charters to contribute to company’s technology competitiveness and readiness in the future.
Develop research directions and topics to advance state of art knowledge and insights on subject matters.
The total target annual compensation for this position ranges from $106,000 to $156,000 depending on education, experience, and demonstrated expertise.