- Location
- San Diego, CA,US, US
- Type
- Full-time
- Department
- Engineering
- Experience
- 2+ years
- Education
- Master
- Source
- Eightfold
Description
Develop Verification Plans: Understand design specifications and define the verification scope. Develop detailed test plans and verification infrastructure. Execute Verification Tests: Implement and Execute verification test cases and debug complex issues. Implement and analyze System Verilog assertions and coverage (code, toggle, functional). Collaborate with Teams: Work closely with architects, designers, and pre and post-silicon verification teams to accomplish tasks. Innovate Solutions: Develop innovative solutions to verification challenges with minimal guidance. Ramp-up on new verification tools and methodologies. Explore innovative DV methodologies to continuously push the quality and efficiency of test benches. Adhere to Standards: Maintain quality standards and best practices in test and verification processes. Successful candidates will be required to collaborate with worldwide design, verification, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. Bachelor's degree in Science, Engineering, or related field Minimum 2+ years of design verification experience. *Senior positions to be offered to candidates with proven expertise in the relevant field Good understanding of SystemVerilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in handling verification from Test planning to Tapeout for large-size HW Design Master's degree in Science, Engineering, or related field 5+ years industry experience with below skillset: Knowledge of SOC architecture, CPU architecture (ARM knowledge is helpful), DSP, AMBA Bus, DDR, GPU, Multimedia etc. Exposure to ARM SBSA (Server Base System Architecture) Experience with heterogenous multi-die system verification Experience with D2D interfaces (e.g., UCIe, CXL) verification Experience with pre-silicon emulation platform-based verification Knowledge of Power design, architecture, and verification requirements Displays a passion for debugging and strong problem-solving abilities Experience with scripting languages such as Perl, Python is a plus Assertion coding and converging on Formal tools, is a plus Bachelor's degree in Science, Engineering, or related field.