- Salary
- $125k – $160k/yr
- Location
- Palo Alto, California
- Workplace
- Onsite
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Experience
- 4+ years
- Education
- Bachelor
- Visa
- Not sponsored
- Source
- Lever
Description
Array Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world.
We’re launching a coordinated fleet of radar satellites to create a high-resolution 3D map of the Earth – updated in real time – enabling faster, smarter decision-making for government and commercial organizations supporting disaster response, infrastructure resilience, and mission-critical geopolitical intelligence.
We design and build our satellites end-to-end, producing the world’s most advanced earth observation satellites. Our fleet will deliver unprecedented levels of accuracy, coverage, and responsiveness to power critical insights precisely where they’re needed most.
About the job
As a Senior RF PCB Layout Engineer, you will own the physical implementation of Array’s RF and microwave electronics in Altium, translating schematics and performance requirements into layouts that work on the first spin. Your work will include component placement, controlled-impedance routing, stack-up definition, grounding and shielding strategy, connector and launch design, and isolation of sensitive RF and mixed-signal domains.
You will partner closely with RF design, electrical, antenna, mixed-signal, mechanical, and test engineers to drive layout constraints, reviews, and manufacturing releases. The boards you ship will directly determine RF performance, stability, spurious behavior, and overall sensor reliability in the lab and on orbit.
