- Location
- US, CA, Santa Clara, United States of America
- Workplace
- Hybrid
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Source
- Workday
Description
We are now looking for a Senior Signal & Power Integrity Engineer!
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle!
What you'll be doing:
Work on crafting creative Signal Integrity solutions to complex system design problems
System-level signal integrity simulations of high-speed NVlinks 200Gbs+, USB-4, PCIe5, GDDR6, LP5X
Modeling of vias, connectors, sockets and various system components in 3D EM tools.
Design and optimize Power Delivery Network (PDN) across packages and PCBs.
Constant improvements of SI/PI models through lab measurements
Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools.
Opportunity to work in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit
What we need to see:
BS/MS-Electrical Engineering or equivalent experience.
3+ years of industry experience.
SI/PI work on one or more signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X
Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE or similar.
Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations.
Background with a system level timing or loss budget including silicon, package and board impairments.
Familiarity with use of VNA, TDR, DSO, ParBERT and use of applications like JMP, Matlab will be a plus
Ways to stand out from the crowd:
Expertise in one or more of the high speed interface SI/PI design on any industry standard system platforms.
Experience with lab measurements, debugging, SI lab correlation using oscilloscope/ spectrum analyzer/ VNA.
Knowledge of circuit design, board/pkg component design, link architecture, timing budget methodologies
#LI-Hybrid
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.
You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.