Principal Engineer, Edge NPU Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Edge NPU Architect
 

Location

Beijing/Shanghai China
 

About the Role

We are seeking an experienced and highly motivated NPU Architect to lead the development of next-generation high-performance, low-power Neural Processing Unit (NPU) architectures for edge AI applications.

The ideal candidate will play a key role in building scalable AI acceleration solutions based on open-source NPU technologies, enabling efficient execution of small and medium-sized LLMs (Large Language Models) on resource-constrained edge devices.

This role spans architecture definition, hardware/software co-design, AI workload optimization, compiler/toolchain enablement, and system-level performance tuning.

Candidates with strong experience in high-performance RISC-V CPU architecture or heterogeneous AI computing systems are highly preferred.

Responsibilities

• Define and architect high-performance, low-power NPU cores for edge AI and LLM inference applications
• Evaluate and leverage open-source NPU architectures and AI acceleration frameworks
• Drive hardware/software co-design for efficient execution of transformer-based models and LLM workloads
• Optimize NPU architecture for:
  • Transformer inference
  • KV cache handling
  • Attention acceleration
  • Memory bandwidth efficiency
  • Sparse computation
  • Quantized AI models (INT8/INT4/FP8)
• Develop scalable AI compute and memory subsystem architectures
• Collaborate with RTL, compiler, SDK, and AI software teams to enable end-to-end AI execution flow
• Build and optimize the complete software toolchain, including:
  • Compiler
  • Runtime
  • Kernel libraries
  • Model conversion tools
  • Performance profiling and debugging infrastructure
• Enable popular AI frameworks and LLM runtimes on the NPU platform
• Analyze workload bottlenecks and optimize system-level power/performance/area (PPA)
• Work closely with system architects to define heterogeneous computing architectures integrating CPU, NPU, memory, and interconnect subsystems
• Contribute to future AI architecture roadmap and technology strategy

Qualifications

Required

• MS or PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field
• More than 3 years strong experience in AI accelerator, NPU, GPU, DSP, or heterogeneous compute architecture
• Deep understanding of:
  • Transformer architectures
  • LLM inference
  • Neural network acceleration
  • Memory hierarchy optimization
  • Dataflow architecture
• Experience with AI model optimization techniques including:
  • Quantization
  • Pruning
  • Sparsity
  • Operator fusion
• Solid understanding of hardware/software co-design methodologies
• Familiarity with compiler and runtime stacks for AI acceleration
• Experience with RTL architecture and performance modeling
• Strong programming skills in C/C++, Python, or similar languages

Preferred Qualifications

• Experience with high-performance RISC-V CPU architecture or SoC design
• Experience with vector processors, SIMD/SIMT architectures, or AI instruction extensions
• Familiarity with MLIR, TVM, ONNX, LLVM, or related AI compiler frameworks
• Experience enabling LLMs on edge or embedded AI platforms
• Experience with low-power SoC architecture and mobile/edge AI optimization
• Familiarity with chiplet, NoC, or advanced memory architectures
• Experience with open-source AI acceleration ecosystems

What We’re Looking For

• Passion for AI computing and next-generation semiconductor technologies
• Strong system-level thinking and architectural vision
• Ability to bridge hardware architecture and AI software ecosystems
• Hands-on mindset with strong execution capability
• Self-driven and collaborative team player

Why Join Us

You will have the opportunity to shape the future of edge AI computing by building cutting-edge AI acceleration technologies that enable real-world deployment of LLMs and generative AI on power-constrained devices.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days