EUV Lithography Process Development Engineer- TPG

Req ID:

JR97382 EUV Lithography Process Development Engineer- TPG (Evergreen)

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Join our Lithography Pathfinding team in Boise and help shape the future of memory technology! We are a highly collaborative group focused on developing next-generation patterning solutions that enable advanced memory scaling. Our work sits at the intersection of research, development, and manufacturing, giving you the opportunity to influence technology from concept through production.

As a Lithography Pathfinding Process Development Engineer, you will play a critical role in evaluating and enabling next-generation lithography technologies, including EUV and High NA EUV. You’ll partner across technology development and manufacturing teams to align new capabilities with Micron’s roadmap, ensuring readiness for high-volume production. This role offers hands-on innovation, cross-functional collaboration, and opportunities to work with groundbreaking lithography tools and processes.

Responsibilities:

• Lead pathfinding efforts for advanced patterning technologies across 193nm immersion, EUV, and High NA EUV
• Develop and optimize EUV lithography modules in the technology development environment
• Partner with defect inspection and mask teams to define EUV mask inspection strategies
• Collaborate with manufacturing sites to align process transfer, equipment, and materials readiness
• Travel as needed (up to once per month) to support High NA EUV development and early learning activities

Minimum Qualifications:

• M.S. or Ph.D. in Engineering, Chemistry, Physics, or related field with 3+ years semiconductor experience, or B.S. with 10+ years relevant experience
• Strong understanding of EUV lithography and distinctions from DUV lithography
• Experience with 193nm immersion multiple patterning (LELE, SAQP)
• Knowledge of photolithography optics or experience with simulation tools such as Prolith or S-Litho

Preferred Qualifications:

• Hands-on experience with High NA EUV in a pathfinding or development setting
• Experience with statistical analysis, design of experiments, and tools such as JMP or Python
• Strong communication skills with the ability to deliver clear technical and executive-level summaries
• Experience using AI-assisted analytics to enhance data interpretation, anomaly detection, and yield improvement initiatives

Job Profile(s):

Semiconductor Process Engineer 3 - Semiconductor Process Engineer 5

Relocation Level: TBD

Before Getting Started

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