- Location
- San Diego, CA,US, US
- Type
- Full-time
- Department
- Engineering
- Education
- PhD
- Source
- Eightfold
Description
Develop RTL for the corresponding micro architecture ### The team looks for wide range of level and experience, typically from 3 years to 20 years. ### Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design verification ### Experience with Computer Architecture, Computer Arithmetic, Low power design, C/C++/Python programming languages is desired. ### Experience in designing RTL for GPU, CPU, DSP, Machine-Learning, cache, controller, video, display, camera blocks in ASIC is desired. ### Exposure to Graphics API (OpenGL, Vulkan, Direct3D, etc) is big plus ### Good communication skill and desire to work as a team player Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience. Optimize the silicon cost and improve clock speed Troubleshoot silicon issues with products relevant to the corresponding design