As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Mixed Signal Design Engineer

Why Ciena? 

·       We’re a company rooted in people—seeking to create a vibrant and inclusive environment, where everyone feels they can belong.  

·       We are big proponents of life-work integration. Our people make a big difference at Ciena, but we want to shine light on their differences outside of working hours too. Ciena Cares supports non-profit causes important to employees bymatching employee financial contributions and dedicating time for volunteering. 

·       Great work deserves recognition. We have a robust recognition program, with ongoing and enhanced awards for exemplary performance.

·       You will be a member of a successful team working on the forefront of technological innovation focused on leading-edge technologies, flows and products.  You will be working with, and learning from, industry-recognized experts. 

How You Will Contribute:

The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is one of the main contributors to Ciena's success in the telecommunications industry. Successful candidates will be joining a vibrant team with a proven track record of success over 30 years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems. This team pioneered the introduction of the world’s first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions. Reporting to the Senior Manager of Analog Engineering, your role will be: 

• Designing the high precision Sigma-Delta DAC and ADC for control and monitoring
• Designing the SystemVerilog models for various analog macros
• Designing the IBIS-AMS models for the high-speed DAC and ADC based SerDes IP running at 56Gbd, 112Gbd, 224Gbd, and 448Gbd
• Creating Design Specification Document
• Interacting with and providing support to the system team, analog team, the digital team, the DSP team, the signal integrity team, the hardware team, firmware team, and the analog lab bring-up team.

What Does Ciena Expect of You? 

• A sense of urgency – what’s important to the customer is equally important to you.  You make getting things done a priority.
• Integrity – you hold yourself to the highest level of personal and professional standards of conduct. 
• A commitment to innovation – you continually seek to learn, understand new technologies and ever-changing market conditions, and endeavor to apply that knowledge to Ciena’s advantage. 
• You embrace change – thriving in a diverse environment of ever-changing priorities and sometimes stressful situations. 
• The flexibility to work independently with minimal supervision as well as part of a broader team.

The Must Haves:

• Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level
• Design experience in the latest CMOS and BiCMOS technology
• Proficiency with Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFS
• Familiarity with SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python languages
• Ability to work independently and collaboratively with team members
• Skills of writing and presenting in English

Assets:

• Knowledge of UVM, Git, Gradle, Google Tests
• Experience with the RF and Signal Integrity tools
• DSP, digital, and analog design and modelling in high SerDes application
• AI tools for automation

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.