- Location
- Santa Clara, CA,US, US
- Type
- Full-time
- Department
- IT
- Seniority
- Manager
- Source
- Eightfold
Description
Lead and mentor a team of engineers in developing mixed-signal chips Supervise the planning and specification of algorithms, evaluating PPA (Power, Performance, Area) trade-offs Guide the design of digital circuits such as filters and analog calibration circuits Ensure verification of digital designs using direct and random testing methodologies Lead front-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and coordinate with back-end teams for successful chip tape-outs Drive silicon bring-up efforts and performance optimization Collaborate with multi-functional teams to align technology roadmaps with business objectives Establish and maintain standard methodologies for mixed-signal design and verification Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until July 29, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. Expertise in Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocks Experience with industry-standard verification methodologies, such as UVM