Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA (Level 3/4)

RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: Yes

CLEARANCE TYPE: Top Secret

TRAVEL: Yes, 10% of the Time

Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman’s Space Sector is seeking a Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA to join our team in Manhattan Beach, CA.      

The Ground Systems Development Department is seeking a Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA to join our team in the development and integration of complex electronic test systems and electronic hardware units in support of space flight programs. This individual would act as a responsible design engineer (RDE) supporting digital development on our program.

The RDE responsibilities include FPGA and PCB: architecture design, detailed design, performing customer briefings/reviews, and hardware test. Primary deliverables are flight electronics test systems and satellite system operational ground-based hardware. 

The candidate will perform designs in a team environment with other engineering functions, including Ground Hardware Engineering, Flight Hardware Engineering, Systems Engineering, Product Engineering, Software Engineering, Production, Procurement, and Program Management to meet schedule and technical requirements.

The ideal candidate has a broad range of experience with: 

• Design, integration, and test of Digital circuits

• FPGA development 

• PCBs/CCA design

• Electronic drawer/unit design

• Small to large electronic subsystems  

Some responsibilities include performing the following:

• Detailed Digital analysis at the component level

• FPGA design, functional simulation, and test vector creation

• PCB/CCA design, development, test, and integration

• Electronic Unit design, development, test, and integration

• Electronic Test System (Test Set) design, development, test, and post-delivery support

• Worst case performance analysis for critical Digital signals

• Developing and presenting design reviews for internal and external customers 

As a full-time employee of Northrop Grumman Space Systems, you are eligible for our robust benefits package including:

• Medical, Dental & Vision coverage

• 401k

• Educational Assistance

• Life Insurance

• Employee Assistance Programs & Work/Life Solutions

• Paid Time Off

• Health & Wellness Resources

• Employee Discounts

This position’s standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off.

**This position can be filled at level 3 or 4.**

Basic Qualifications (Level 3):

• Bachelor's Degree in a STEM discipline plus 5 years of engineering experience OR Master’s Degree in a STEM discipline plus 3 years of engineering experience OR 1 year of engineering experience with a STEM PhD.

• Requires an active Top-Secret clearance at time of application

Basic Qualifications (Level 4):

• Bachelor's Degree in a STEM discipline plus 8 years of engineering experience OR Master’s Degree in a STEM discipline plus 6 years of engineering experience OR 4 years of engineering experience with a STEM PhD.

• Design and test experience in electronics or digital technology

• Previous FPGA design experience

• Requires an active Top-Secret clearance at time of application

Preferred Qualifications: 

• Design and test experience in Analog/RF and Digital technology

• Master’s degree in Electrical or Computer Engineering from an accredited institution

• Excellent written and verbal communication skills

• Active Top Secret clearance & SCI clearance access

Primary Level Salary Range: $125,300.00 - $187,900.00

Secondary Level Salary Range: $156,400.00 - $234,600.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.