Analog/Mixed Signal ASIC Design Engineer

1. Work in our analog design team for schematic capture and simulations and participate in architecture definition and analog/digital design partitioning. 2. Schematic capture and simulations in the Cadence Virtuoso tool suite. 3. Work with cross functional teams (i.e. layout and digital teams) 4. Work with testing team for silicon bringup and debugging Several years of industry experience in the area of analog integrated circuit/system design. Experience as an high speed analog designer of mixed-signal IPs, such as CTLE, CDR, PLL RXAFE, PLL, DAC, ADC Familiar with Matlab and Python and good understanding of architecture, system and integration aspects for mixed-signal Good understanding of design for yield and production challenges with high speed serial links Good understanding of Signals and Systems, Sampled Domain signal processing a plus Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience. OR Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience. OR PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience. 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).