- Location
- Hyderabad, TS,IN, IN
- Type
- Full-time
- Department
- Engineering
- Seniority
- Lead
- Source
- Eightfold
Description
Contribute to the Development of New Memory Products by Assisting with Algorithm Design and Firmware Development for the Internal NAND Operations, the Overall Logic Design, and Optimization of Memory Circuits. Ability to interpret device and system specifications to produce required functionality Participate in new circuit conception and design as needed Define and create design architecture spec documents for the new features Assist in design and development of schematics and/or RTL blocks Mentor new hires Manage Verification Processes Perform RTL and synthesized netlist (gate level) verification at fullchip level Facilitate netlist bring up to achieve basic functionality Create verification plan for new and existing features and check expected behavior in Verilog Collaborate with Product Engineering wrt validation plan and review Silicon result Assist in silicon design validation, reticle experiments, qual and tape-out revisions as needed Define best known design and verification practices and communicate to the entire department Prepare detailed documentation as required Participate in recruiting, and interviewing of new candidates Create new hire ramp up plans Contribute to Cross Group Communication to Work Towards Standardization and Group Success Work with Device, System, Probe, Test, CAD, Field Application Engineers, and Product Engineering groups to ensure proper manufacturability of product Proactively solicit input from various groups (i.e. Standard cell development; simulation, voltage)
