- Location
- Cambridge, England,GB, GB
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Education
- PhD
- Source
- Eightfold
Description
Deep knowledge of Micro-Processor Verification functions and Architectures, in domains such as: Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management. Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness. Experience in leading a small team of Verification engineers performing CPU Verification. Advance techniques such as: Formal, Assertions, and Silicon bring up, is helpful. In-depth knowledge of Micro-processor functions, Architectures, and Micro-architectures. Experience in writing Test plans, portable Testbenches, Transactors, and Assembly code. Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Formal Proof Tools. Ability to develop and work independently on a Block/Unit of the design. Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field. References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.