- Location
- BEIJING 04, China
- Type
- Full-time
- Department
- Engineering
- Education
- Bachelor
- Source
- Workday
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
1.To provide key technical support in digital IC design implementation.
2.To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power designs.
3.Have real design experience including logic equivalence checking, logic synthesis,
4.Have rich experience for RTL debug, RTL timing and power analysis.
5: Rich experience for Synthesis flow, and be familiar with backend implementation
Position Requirements:
1.Master/Bachelor's degree is essential and 3+ years’ experience in IC design, electronic engineering or computer science applications.
2. Eager to learn new technologies, and willing to promote new technologies to customers
3.Requires working knowledge of one or more programming languages, and effective communication and soft skills.
4.Ability to debug all kinds of logic equivalent checking issues with formal tools(LEC, etc).
5.Ability to understand the low power design with UPF, IEEE1801, CPF,etc.
6.Have knowledge or experience in debugging the low power design issue with static check tools(ie. CLP ,etc).
7.Have experience in STA flow.
8.Have knowledge or experience in RTL coding is Plus.
