Hiring.Camp

Senior Customer Technical Enablement and Debug Engineer

Intel

·

Jun 8, 2026

Salary
$142k – $269k
Location
USA - CA - Santa Clara, United States of America · US, Oregon, Hillsboro
Workplace
Onsite
Type
Full-time
Department
Engineering
Seniority
Senior
Experience
5+ years
Education
Bachelor
Industry
Technology
Category
Engineering
Environment
Office
Source
Workday

Overview

As a Senior Customer Technical Enablement Engineer, you'll act as the primary technical contact for customer issues, leading real-time triage and resolution. You'll debug across hardware, firmware, and software stacks, collaborate with internal teams, and drive improvements in debug workflows and field diagnostics. The role requires strong communication and problem-solving skills.

Description

Job Details:

Job Description: 

The Role and Impact

Join Intel’s IPU engineering team and play a critical role as the frontline technical interface with strategic customers.

In this position, you will lead system-level debug and issue resolution for Intel’s networking IPU deployments and work directly with customers to diagnose and resolve complex HW/FW/SW issues in real-world environments. This is a highly visible role combining deep technical expertise with customer engagement, where your work directly impacts product success, deployment quality, and customer satisfaction.

Key Responsibilities

Customer-Facing Debug & Support

  • Act as the primary technical point of contact for customer-reported issues
  • Lead real-time triage, debug, and resolution of complex system issues in customer environments
  • Communicate findings, status, and mitigation plans clearly to customers and stakeholders

System-Level Debug (HW / FW / SW)

  • Investigate and debug issues across the full stack: silicon, firmware, drivers, and system software
  • Reproduce field issues in lab environments and drive end-to-end root cause analysis
  • Identify failing components (HW/FW/SW) and coordinate resolution across teams

Cross-Functional Collaboration

  • Partner closely with architecture, design, validation, firmware, and software teams
  • Drive escalations, align priorities, and ensure fast issue turnaround
  • Contribute to debug methodologies, tools, and field-debug capabilities

Customer Enablement & Continuous Improvement

  • Support new customer use-cases and deployment enablement
  • Improve debug workflows, visibility, and in-field diagnostics
  • Capture and drive closure of systemic issues (escapees)

Core Competencies

  • Strong problem-solving and root cause analysis capabilities
  • Ability to debug across multiple domains (HW + FW + SW)
  • Excellent communication skills with external customers
  • Ability to work under pressure and manage high-priority escalations

Qualifications:

The Minimum qualifications are required to be initially considered for this position.  Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
  • 5+ years of experience in system-level debug (HW/FW/SW)
  • Strong experience with networking systems, drivers, and Linux environments
  • Experience debugging complex silicon/system issues in lab or customer environments

Preferred Qualifications

  • Post Graduate Degree in Electrical Engineering, Computer Engineering, or in a related field
  • Knowledge of IPU / SmartNIC / data center networking architectures
  • Experience with PCIe, RDMA, Ethernet, virtualization, or cloud infrastructure
  • Familiarity with debug tools, logs, and low-level interfaces (JTAG, trace, dumps)
  • Prior experience in customer-facing engineering roles

    Why This Role

    • Direct impact on customer success and product deployment
    • Work at the intersection of silicon, networking, and large-scale systems
    • High visibility with both internal leadership and strategic customers

              

    Job Type:

    Experienced Hire

    Shift:

    Shift 1 (United States of America)

    Primary Location: 

    US, California, Santa Clara

    Additional Locations:

    US, Oregon, Hillsboro

    Business group:

    The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

    Posting Statement:

    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

    Position of Trust

    N/A

    Benefits

    We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

     

     

    Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

     

     

    The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

     

     

    Work Model for this Role

    This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

    *

    ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

    Skills

    LinuxCompliance

    Languages

    English

    About Intel

    Intel's Central Engineering Group builds scalable engineering solutions across IP, tools, methodologies, Custom ASIC, and Foundry Enablement.

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    Senior Customer Technical Enablement and Debug Engineer at Intel • $142k – $269k | Hiring.Camp