- Location
- Santa Clara, CA,US, US
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Source
- Eightfold
Description
Work on crafting creative Signal Integrity solutions to complex system design problems System-level signal integrity simulations of high-speed NVlinks 200Gbs+, USB-4, PCIe5, GDDR6, LP5X Modeling of vias, connectors, sockets and various system components in 3D EM tools. Design and optimize Power Delivery Network (PDN) across packages and PCBs. Constant improvements of SI/PI models through lab measurements Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools. Opportunity to work in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations. Expertise in one or more of the high speed interface SI/PI design on any industry standard system platforms. Experience with lab measurements, debugging, SI lab correlation using oscilloscope/ spectrum analyzer/ VNA.