- Location
- Bengaluru, KA,IN, IN
- Type
- Full-time
- Department
- Engineering
- Seniority
- Lead
- Experience
- 5+ years
- Education
- PhD
- Source
- Eightfold
Description
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ years of experience with emulation platforms - Palladium, Zebu, Veloce, FPGAs. Experience with synthesizing and optimizing designs and verification components developed in synthesizable Verilog. Experience with C/C++ DPI transactors and monitors. Experience in scripting using Perl, Python or shell scripts. Experience with packaging workloads for cloud. Experience with debugging ARM CPU based designs. Knowledge on ARM ISA and programmers' model is a plus. Experience with Linux boot and firmware aspects is a plus. Experience with CPU architecture and micro-architecture is a plus. Work closely with CPU RTL, performance, verification and SW teams to deliver emulation-based solutions. Architect and develop test bench infrastructure in C/C++ and Systemverilog for enabling CPU emulation across different platforms. Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Debug emulation performance and area issues to efficiently use emulation resources. Develop environment to run verification test cases, OS boot, performance benchmarks and other vectors. Develop debugging methodology to enable efficient debug and root causing of CPU functional and performance issues. Develop and maintain emulation environment to collect metrics related to emulation environment. Work closely with emulation CAD team to resolve infrastructure issues and ensure productivity on emulation models. Execute verification plans, including design bring-up, DV environment bring-up, regression enabling for all features under your care, debug of the test failures.