MTS ASIC Architect

Req. ID:

JR102590 MTS ASIC Architect

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

DRAM ASIC Architecture

Role Overview

The DRAM ASIC Architecture team defines silicon level architectures that extend and differentiate the value of Micron’s DRAM products. The team works across technology generations and product lines, collaborating closely with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high-performance memory solutions aligned with customer and market needs.

As a Member of Technical Staff, you will provide senior level architectural leadership for ASIC and logic-based DRAM solutions that emphasize high bandwidth, energy efficiency, scalability, and reliability. This role spans near term product execution and long term technology direction, with architectural ownership over decisions that impact bandwidth density, latency, RAS, and system observability.

Key Responsibilities

• High‑Bandwidth DRAM Architecture
• Define ASIC and logic architectures that enable high data throughput, efficient parallelism, and scalable bandwidth delivery for advanced DRAM products.
• Drive architectural features that improve effective bandwidth, latency efficiency, and utilization under demanding workloads.
• Silicon–Package–System Co‑Optimization
• Lead architectural trade‑off analyses across DRAM silicon, ASIC logic, packaging constraints, and system integration considerations.
• Ensure architectural choices account for power delivery, thermals, signal integrity, and form‑factor limitations.
• Architectural Partitioning & Interfaces
• Influence functional partitioning and interface definition across DRAM devices and associated logic to optimize performance, power, and scalability.
• Contribute to definition of robust, scalable interfaces and protocols that support high data rates and reliable operation.
• Silicon Architecture Analysis
• Drive architectural analysis including PPA evaluation, IO timing considerations, and scalability paths for next‑generation DRAM products.
• Establish architectural guardrails that enable reuse and extensibility across product families and technology nodes.
• Technical Quality & First‑Silicon Success
• Perform micro‑architectural, RTL, and design reviews, along with verification and coverage reviews, to ensure high‑quality execution and first‑silicon success.
• Proactively identify architectural risks and guide mitigation strategies in collaboration with design and validation teams.
• Technical Leadership & Mentorship
• Serve as a technical mentor and architectural authority for execution teams, elevating technical rigor and design quality.
• Influence cross‑functional decisions through clear reasoning, data‑driven analysis, and deep architectural insight.

Minimum Qualifications

• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Extensive professional experience in DRAM die architecture, including deep understanding of architectural trade‑offs affecting bandwidth, latency, power efficiency, and reliability (RAS).
• Proven experience leading micro‑architectural and architectural decisions on complex memory subsystems or silicon solutions, from specification through product delivery.

Preferred Qualifications

• Master’s or PhD degree (or equivalent experience) in a relevant engineering or computer science field.
• Experience collaborating across multiple technical domains such as DRAM silicon, ASIC logic, packaging, high‑speed interfaces, or system architecture.
• Experience engaging with customers, ecosystem partners, or industry standards organizations (e.g., JEDEC).
• Demonstrated technical leadership across multiple projects or product generations.
• Familiarity with system‑level tradeoffs involving performance, power, signal integrity, thermals, or cost.

Job Profile(s):

Systems Design Engineering MTS

Relocation level: (TBD)

Before Getting Started

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As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.