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Principal Engineer/Sr. Principal Engineer Digital-RF Subsystems I&T Lead

Northrop Grumman

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Salary
$120k – $179k
Location
MDLI03, United States of America
Type
Full-time
Department
Engineering
Seniority
Lead
Experience
5+ years
Education
PhD
Clearance
Required
Source
Workday

Description

RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: Yes

CLEARANCE TYPE: Secret

TRAVEL: Yes, 10% of the Time

Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

The AMS E&S organization at Northrop Grumman Missions Systems in Baltimore, Maryland is seeking experienced digital and RF subsystem integration and test engineers and technical leads in the following areas:

Digital receiver/exciter and related digital-RF subsystem integration, subsystem control design, and architecture. Work is performed without appreciable direction and exercising considerable latitude in determining technical objectives of assignments. Candidates would have the ability to develop technical solutions to complex problems which require the regular use of ingenuity and creativity. 

The qualified candidates will work with a diverse and talented team of engineers developing innovative and cost-effective systems that support a broad range of products and business areas across the lifecycle of a program.  Applicants should possess the ability to communicate effectively and clearly present technical approaches and findings.

Responsibilities may include:

  • Integration of digital receiver/exciter hardware and representative lab test environments
  • Integration of new equipment and programs in a state-of-the-art facility 
  • Software development for automating test processes and data analysis 
  • Troubleshooting digital and RF issues during test of advanced antenna systems and system-on-chip designs
  • Analyzing test data and identifying early trends
  • Supporting program meetings in developing root cause and corrective actions 
  • Collaborating with design engineering for hardware, controls, and test improvements 
  • Subsystem analysis including digital architecture, signal paths, and hardware interfaces from RF front end through digital processing
  • Support for performance testing, requirements verification, and more.

In addition, this candidate should have demonstrated technical ability/leadership and expertise in one or more of the following areas:

  • Digital-RF subsystem integration, test, and system integration
  • System-on-chip FPGA and/or front-end software design
  • Highly integrated digital-RF subsystems, antenna hardware, and receiver/exciter hardware for active electronically scanned array (AESA) systems
  • Development and verification of complex front-end and subsystem controls across systems
  • Electronic warfare, radar, or related mission-system principles and their system applications
  • Subsystem requirements (hardware and digital) derivation, flow-down, and configuration
  • Comfort creating test support applications and tools using MATLAB or similar technical computing tools
  • Conducting Test Readiness Reviews and/or Design Readiness Reviews
  • Concept of operations development for integration and test activities 
  • Executing subsystem and system level testing – both in engineering development and manufacturing environments

This role is contingent upon candidates having a current, active government Secret Clearance.

This role is contingent upon Program Award.

This is a Dual-level opening, candidates will be considered at both a level 3 (Principal Engineer) or 4 (Sr. Principal Engineer) based upon the Basic Qualifications listed below.

Basic Qualification - Principal Digital-RF Subsystems Integration & Test:

  • Must hold a Secret or Top-Secret security clearance
  • Must have a Bachelors Degree in Engineering or related discipline with 5 years of experience in the areas described in the job description or Master's Degree with 3 years of experience or PhD with 0 years of experience. An additional 4 years’ experience is acceptable in lieu of degree.
  • Experience using MATLAB or similar engineering analysis tools
  • Experience with digital and/or RF subsystem integration and test
  • Experience with setup and testing of hardware in a lab or benchtop environment

Basic Qualification Sr. Principal Digital-RF Subsystems Integration & Test:

  • Must hold a Secret or Top-Secret security clearance
  • Must have a Bachelors Degree in Engineering or related discipline with 8 years of experience in the areas described in the job description or a Masters Degree with 6 years of experience or PhD with 4 years of experience. An additional 4 years’ experience is acceptable in lieu of a degree.
  • Strong experience using MATLAB or similar engineering analysis tools
  • Experience with digital and/or RF subsystem integration and test
  • Experience with setup and testing of hardware in a lab or benchtop environment
  • Ability to delegate, task, and provide technical oversight for junior engineers

Preferred Qualifications:

  • TS/SCI clearance
  • SAP clearance

Strong knowledge of:

  • Setting up lab, system integration, and digital-RF hardware test environments
  • Control architectures and control design/integration for hardware with firmware, embedded software, and ASICs

Knowledge of:

  • RF and antenna theory, including RF performance analysis
  • Python
  • VHDL/Verilog
  • C++
  • Test development experience for lab test environments and subsystem hardware
  • Experience troubleshooting digital-RF subsystems
  • Understanding of digital signal processing chains
  • Experience working with and supporting engineers across firmware, software, power, and RF test teams

Primary Level Salary Range: $119,600.00 - $179,400.00

Secondary Level Salary Range: $149,300.00 - $223,900.00

The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.

Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Skills

PythonMATLABSAP

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