Master Thesis: Cast PyTorch to RTL

## Join our Team

About this opportunity:

Deploying neural networks on real-time or embedded hardware (FPGA/ASIC) today often means doing manual RTL translation, wiring up weight memories, and tuning parallelism to fit DSP budgets — work that can take days to weeks per model. Existing HLS tools (e.g., Vitis HLS, Intel HLS) focus on C/C++ rather than trained checkpoints, and neural network compilers (e.g., TVM, ONNX Runtime) target software runtimes instead of parameterized RTL for different FPGA targets.

This thesis closes the power-efficiency and productivity gap by creating an automated tool chain that converts PyTorch/AI models into synthesizable RTL for FPGA/ASIC. You will build on an existing foundation codebase to broaden model and layer support and deliver an end-to-end flow from model to hardware. You will work at the intersection of AI, digital design, and EDA tooling; deliver real hardware acceleration results with measurable impact; collaborate with experienced researchers and hardware engineers; and contribute to a tool that can drastically reduce time-to-hardware.

What you will do:

• Develop a tool chain that takes PyTorch models — trained (.pth/.pt) or untrained (.py) — and automatically generates:
• A complete, synthesizable SystemVerilog implementation

• A synthesis planning report

• An RTL hierarchy file

• A ready-to-build FPGA/ASIC project

• Investigate and compare current research on AI-to-RTL conversion methods

• Understand our approach and improve its underlying theories

• Continue developing the tool chain from the base code to support as many models and layer types as possible

• Use the tool chain to convert a real model and deploy it on an FPGA to test function and performance

• Conclude with a result presentation for the Ericsson Research team

The skills you bring:

• Master’s studies in Electrical Engineering, Computer Science, Computer Engineering, or similar

• Background in AI models and RTL code development

• Familiarity with PyTorch, digital design (SystemVerilog/Verilog/VHDL), and FPGA tool flows (e.g., Xilinx/AMD, Intel) is meriting

• Understanding of HLS, compilers, or hardware/software co-design is a plus

Why join Ericsson?

At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next.

What happens once you apply?

Click Here to find all you need to know about what our typical hiring process looks like.Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity Employer. learn more.

Primary country and city: Sweden (SE) || Stockholm

Req ID: 790478