Hiring.Camp

FPGA Design Engineer

Ouster

·

Yesterday

Salary
$134k – $20k
Location
San Francisco, CA
Workplace
Onsite
Type
Full-time
Department
Engineering
Experience
2+ years
Closing date
Today
Source
ApplyToJob

Description

At Ouster, we build sensors and tools for engineers, roboticists, and researchers, so they can make the world safer and more efficient. We've transformed LIDAR from an analog device with thousands of components to an elegant digital device powered by one chip-scale laser array and one CMOS sensor. The result is a full range of high-resolution LIDAR sensors that deliver superior imaging at a dramatically lower price. Our advanced sensor hardware and vision algorithms are used in autonomous cars, drones and many other applications. If you’re motivated by solving big problems, we’re hiring key roles across the company and need your help!

As an FPGA Design Engineer on the firmware team, you will contribute directly to the RTL development, verification, and testing that powers our next-generation lidar systems. Working alongside a team of talented engineers, you will implement low-level logic, assist with system integration, and help optimize real-time sensor performance. This role spans core FPGA development, simulation, and software-hardware integration, offering a strong opportunity to build deep technical expertise in a fast-paced environment. In addition, you will work closely with the broader firmware team to collaborate on design reviews and align on technical execution. Strong communication and a desire to learn are required for our entire team! Come build lidar with us!

This is an onsite position based in our San Francisco, CA office. 

BASIC QUALIFICATIONS:

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or equivalent.
  • 2+ years of experience in FPGA development including HDL code development, simulation, test bench development, synthesis, and timing closure.
  • High proficiency in SystemVerilog or Verilog
  • Proficiency in C or C++ programming languages.
  • Hands-on experience with FPGA toolchains for AMD Xilinx (Vivado) or Intel/Altera (Quartus).
  • Experience developing logic for FPGA-based SoC devices (such as Xilinx Zynq or Intel Arria) using bus interconnects like AXI.
  • Experience with version control tools such as Git using best practices.

BONUS QUALIFICATIONS:

  • Experience using lab tools (logic analyzers, oscilloscopes) for hardware debugging and board bring-up.
  • Experience with High-Level Synthesis (HLS) or Vitis tools.
  • Experience with DSP and algorithm development.
  • Experience with modern verification methodologies like UVM.
  • Experience in Linux environments with scripting in Python, TCL, or Bash.
  • Experience with industrial safety systems and Functional Safety development processes.

The base pay will be dependent on your skills, work experience, location, and qualifications. This role may also be eligible for equity & benefits. ($133,600-$200,00)

We acknowledge the confidence gap at Ouster. You do not need to meet all of these requirements to be the ideal candidate for this role.

Ouster is an Equal Employment Opportunity employer that pursues and hires a diverse workforce. Ouster does not make employment decisions on the basis of race, color, religion, ethnic or national origin, nationality, sex, gender, gender-identity, sexual orientation, disability, age, military status, or any other basis protected by local, state, or federal laws. Ouster also strives for a healthy and safe workplace, and prohibits harassment of any kind. Pursuant to the San Francisco Fair Chance Ordinance, Ouster considers qualified applicants with arrest and conviction records for employment. If you have a disability or special need that requires accommodation, please let us know.


 

Skills

PythonLinuxGit

Similar Jobs

30

FPGA Design Engineer

York Space Systems·Greenwood Village, CO

2d ago

FPGA Design Engineer

Teledyne·Spain- Sevilla·Hybrid

3w ago

FPGA Design Engineer

Northrop Grumman·Rolling Meadows, IL·Onsite

1mo ago

FPGA Design Engineer

Northrop Grumman·ILRM03, US·Onsite

1mo ago

FPGA Design Engineer

Long Wall·Long Beach, California·Onsite

2mo ago

FPGA Design Engineer

ALTEN·Birmingham, England·Onsite

2mo ago

FPGA Design Engineer

Cisco·IND-BANGALORE, India·Onsite

3mo ago

FPGA Design Engineer

Philips·Haifa - 1, Israel·Onsite

3mo ago

FPGA Design Engineer

Evertz Microsystems Limited·Burlington, ON

3mo ago

FPGA Design Engineer

Leonardocompany·GB - Luton - Cap. Green 300, UK·Hybrid

3mo ago

FPGA Design Engineer

Silvus·Los Angeles +1·Hybrid, Onsite

4mo ago

FPGA Design Engineer

Silvus·Irvine CA +1·Onsite

4mo ago

FPGA Design Engineer

Boeing·USA - Huntsville, AL·Onsite

4mo ago

FPGA Design Engineer

Boeing·USA - Huntsville, AL·Onsite

4mo ago

FPGA Design Engineer

Hewlett Packard Enterprise (HP)·Singapore, Central Singapore·Onsite

6mo ago

FPGA Design Engineer

Hewlett Packard Enterprise (HP)·Singapore, Central Singapore·Onsite

6mo ago

FPGA Design Engineer

Hewlett Packard Enterprise (HP)·Singapore, Central Singapore·Onsite

6mo ago

FPGA Design Engineer

Draper·MA - Cambridge, US·Hybrid

6mo ago

FPGA Design Engineer

Thermoteknix

7mo ago

FPGA Design Engineer

Rochester is our namesake and·Laboratory for Laser Energetics, US

10mo ago

FPGA Design Engineer

Taara·Sunnyvale, CA·Hybrid

1y+ ago

Senior Avionics FPGA Design & Verification Engineer - TeraWave

Blueorigin·WA - O'Neill Building, US +3

1d ago

Senior Avionics FPGA Design & Verification Engineer - TeraWave

Blueorigin·WA - O'Neill Building, US +3

1d ago

Senior Electronics Design Engineer - FPGA & Digital Design (Open also to Protected Categories, Law 68/99)

Thales·Grugliasco, Italy·Onsite

1d ago

Senior FPGA / Digital Design Engineer

Qualis·Huntsville, AL

1d ago

Senior FPGA Design Engineer

Aeronix Technologies Group·Melbourne, FL +1

1d ago

FPGA Design Engineer Senior

York Space Systems·Greenwood Village, CO

2d ago

FPGA Digital Design Engineer II

RTX·US-MA-TEWKSBURY-TB1 ~ 50 Apple Hill Dr ~ ASSABET BLDG, US·Onsite

2d ago

FPGA IP Design and Verification Engineer

Altera·Regus, Madhapur

3d ago

Advanced ASIC FPGA Design Engineer

Gdms·Scottsdale, AZ

1w ago