Hiring.Camp

Senior Director, ARM CPU Design and Verification

Altera

·

6 days ago

Salary
$232k – $341k
Location
San Jose, California, United States, United States of America
Type
Full-time
Department
Design
Seniority
Senior
Experience
15+ years
Education
PhD
Source
Workday

Description

Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

Altera is seeking a Senior Director, ARM CPU Design and Verification to lead the design, verification, silicon validation, and execution of next-generation ARM-based processor solutions integrated into advanced heterogeneous compute platforms.

This executive leader will be responsible for building and leading globally distributed engineering organizations while driving ARM CPU design, SoC integration, design verification, emulation, silicon validation, and post-silicon execution from concept through high-volume production.

The successful candidate will partner closely with CPU Architecture, RTL Design, Software, Firmware, Product Engineering, Manufacturing, and Executive Leadership to define long-term CPU development strategy while ensuring successful execution of multiple high-performance processor programs.

Responsibilities

  • Lead global engineering organizations responsible for ARM CPU design, design verification, emulation, and silicon validation.

  • Drive execution of complex ARM CPU and SoC programs from architecture definition through production silicon.

  • Define and execute long-term CPU design and verification roadmaps aligned with Altera's product strategy.

  • Partner with CPU Architecture teams to define processor microarchitecture, memory hierarchy, cache coherency, interconnect, and chiplet architectures.

  • Lead RTL design, functional verification, emulation, FPGA prototyping, system validation, and post-silicon validation strategies.

  • Drive silicon quality, bring-up, debug, characterization, yield improvement, reliability, and manufacturing readiness.

  • Collaborate with Software, Firmware, AI, Security, and Product Engineering teams on hardware/software co-design initiatives.

  • Define engineering methodologies, verification infrastructure, EDA flows, automation strategies, and best practices that improve engineering productivity and product quality.

  • Build, mentor, and develop high-performing engineering organizations across multiple geographic locations.

  • Drive executive-level technical decision making across CPU design, verification, validation, implementation, and production.

  • Partner with executive leadership to establish long-term CPU technology investments, product roadmaps, and engineering strategy.

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. 

$231,500 - 341,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

#LI-MD1

Qualifications:

Minimum Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 20+ years of semiconductor engineering experience, or a Master's degree with 18+ years of related experience, or a Ph.D. with 15+ years of related experience.

  • 15+ years of experience designing ARM-based CPUs, processors, or complex SoCs.

  • 12+ years of experience leading engineering teams responsible for CPU design, design verification, or semiconductor product development.

  • 10+ years of experience managing cross-functional engineering programs through the complete silicon lifecycle, including architecture, RTL design, verification, validation, silicon bring-up, and production.

  • 10+ years of experience with CPU microarchitecture, multi-core processor design, cache coherency, memory hierarchy, and high-performance compute architectures.

  • 10+ years of experience developing or integrating complex SoCs utilizing industry-standard interconnect protocols such as AMBA AXI, ACE, or CHI.

  • 8+ years of experience leading functional verification, UVM verification, emulation, FPGA prototyping, or system validation activities.

  • 8+ years of experience leading post-silicon bring-up, silicon validation, debug, characterization, yield improvement, or manufacturing readiness activities.

  • 8+ years of experience partnering with software, firmware, architecture, product engineering, and manufacturing organizations to deliver complex semiconductor products.

  • 8+ years of experience managing geographically distributed engineering teams across multiple global locations.

  • 5+ years of experience establishing or improving engineering methodologies, EDA flows, verification infrastructure, continuous integration, or design automation processes.

Preferred Qualifications

  • Master's degree or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

  • 10+ years of experience developing high-performance server-class ARM processors or data center SoCs.

  • 8+ years of experience with ARM Neoverse architectures or other high-performance ARM CPU implementations.

  • 8+ years of experience with chiplet-based architectures, UCIe, or Network-on-Chip (NoC) technologies.

  • 8+ years of experience with UVM-based Design Verification methodologies.

  • 5+ years of experience with coherent interconnect protocols including CHI, ACE, or AXI.

  • 5+ years of experience with high-speed interfaces such as PCIe, DDR, HBM, CXL, or Ethernet.

  • 5+ years of experience supporting AI, cloud infrastructure, high-performance computing (HPC), or data center semiconductor products.

  • Experience developing FPGA-based, programmable logic, or heterogeneous compute solutions.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Skills

Prototyping

Similar Jobs

4

Senior Director, Army Intelligence & INSCOM Account Executive

Parsons Corporation · USA VA Chantilly (14291 Park Meadow Dr), United States of America +1 · Hybrid

1 month ago

Senior Director - Army and Defense Agencies Capture

GDIT · USA VA Home Office (VAHOME), United States of America · Remote

2 months ago

Senior Director - Army and Defense Agencies Capture

Gdit · USA VA Home Office (VAHOME), United States of America · Remote

2 months ago

Senior Director Capture Aerospace – Army Aviation - United States (Remote)

V2X · US Remote · Remote

1 month ago