Principal Design Verification Engineer, HBM

Req ID:

JR105632 Principal Design Verification Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities

• Verify IP, subsystem, full-chip, and system-level HBM and DRAM designs to ensure functional correctness, performance, power efficiency, and product quality.
• Develop comprehensive verification plans from architecture and functional specifications in collaboration with architecture and design teams.
• Create, enhance, and maintain verification environments, UVM testbenches, test suites, and automated regression infrastructures.
• Define and execute coverage-driven verification strategies to achieve functional, assertion, and code coverage goals.
• Lead debug and root-cause analysis of complex design issues, drive bug resolution, and ensure verification closure.
• Apply advanced digital and mixed-signal verification methodologies using industry-standard simulation and verification tools.
• Drive continuous improvements in verification methodologies, automation, regression efficiency, and AI-assisted verification workflows.
• Collaborate closely with global design, architecture, product engineering, and system engineering teams to ensure successful project execution.
• Lead verification efforts for major HBM development programs and mentor engineers through technical leadership and knowledge sharing.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
• 10+ years of experience in digital and/or mixed-signal design verification with a proven record of delivering successful silicon products.
• Strong understanding of CMOS circuit design fundamentals.
• Strong expertise in SystemVerilog, UVM, assertion-based verification (SVA), and coverage-driven verification methodologies.
• Experience debugging complex design and verification issues in large-scale ASIC, SoC, or memory designs.
• Excellent analytical, problem-solving, communication, and cross-functional collaboration skills.
• Proficiency and experience in AI assisted verification flow

Preferred Qualifications

• Strong understanding or experience in DRAM and/or HBM architecture, protocol operation, memory subsystems, and high-performance computing applications.
• Experience with analog and digital simulation tools such as HSPICE, FineSim, Verilog, and mixed-signal simulation environments.
• Proficiency in Python, Perl, or similar scripting languages for verification automation, regression management, and data analysis.
• Demonstrated technical leadership, including mentoring engineers, influencing verification methodology, and driving cross-functional execution.
• Experience developing scalable verification infrastructures and automation frameworks for complex SoC or memory products.

Job Profile(s):

Systems Design Engineer 5

Relocation Level: TBD

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