Hiring.Camp

Sr. ASIC Design Engineer

AMBARELLA

·

Aug 14, 2025

Salary
$135k – $170k
Location
US Headquarters, United States of America
Type
Full-time
Department
Engineering
Seniority
Senior
Source
Workday

Description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Position Responsibilities:

  • Designing and implementing video compression, image processing, vector computation, and flexible compute systems optimized for future AI agents and large language model (LLM) inference—alongside processor cores and memory subsystems using System Verilog, with a focus on enabling next-generation edge AI markets such as automation, robotics, and intelligent low power embedded systems.
  • Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
  • Synthesize and optimize RTL for timing, area, and power.
  • Explore micro-architecture and architectural tradeoffs via quick modelling using scripting languages such as python, Perl etc.
  • Developing unit level test environments and tests cases
  • Developing front-end methodologies and tool flows.
  • Participating in chip bring-up and testing.
  • Analyzing and reviewing code coverage and functional coverage and providing recommendations to the verification team to address any gaps.

Requirements:

  • Master’s degree in electrical/Electronics/Computer Engineering with 0-5 years of experience.
  • Good understanding of computer architecture, logic design and VLSI design.
  • Knowledge of System Verilog, Verilog, python, and Perl.
  • Knowledge of design verification, and functional coverage.
  • Ability to program in scripting languages and the ability to write assembly language programs.
  • Strong communication skills and a good team player.
  • Adept problem-solving abilities
  • Knowledge of logic synthesis and timing closer is a plus

The base salary range is $135,000 - $170,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.

Skills

PythonPerl

Similar Jobs

30

Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs

Amazon

1d ago

Senior ASIC Design Verification Engineer - Slingshot

Hewlett Packard Enterprise (HP)·Chippewa Falls, Wisconsin +2·Hybrid

2d ago

Senior ASIC Design Verification Engineer - Slingshot

Hewlett Packard Enterprise (HP)·Chippewa Falls, Wisconsin +2·Hybrid

2d ago

Senior ASIC Design Verification Engineer - Slingshot

Hewlett Packard Enterprise (HP)·Chippewa Falls, Wisconsin +2·Hybrid

2d ago

Senior ASIC Design Engineer

"Cornelis Networks, Inc."

4d ago

Senior ASIC Package Design Engineer

K2Spacecorporation·Seattle, WA +1

6d ago

Senior ASIC Package Design Engineer

K2Spacecorporation·United States - Remote·Remote

6d ago

Senior ASIC Design Engineer, Low Power AI

Qualcomm·Markham, ON

1w ago

Senior Principal ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Roseville, California·Onsite

1w ago

Senior Principal ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Roseville, California·Onsite

1w ago

Senior Principal ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Roseville, California·Onsite

1w ago

ASIC Physical Design Engineer, Senior

Positron·Remote +1·Remote

1w ago

Senior ASIC Design Engineer

"Cornelis Networks, Inc."

2w ago

Senior Manager, ASIC Design Engineering

"Cornelis Networks, Inc."

2w ago

Senior ASIC Analog Design Engineer (m/f/d)

Aumovio·Regensburg, BY

3w ago

Senior ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Bengaluru, Karnātaka·Onsite

3w ago

Senior ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Bengaluru, Karnātaka·Onsite

3w ago

Senior ASIC Design Engineer

Hewlett Packard Enterprise (HP)·Bengaluru, Karnātaka·Onsite

3w ago

Senior ASIC Physical Design Developer

Cisco·CAN-VANCOUVER, Canada·Hybrid

4w ago

ASIC / FPGA Design Verification Engineer – (Lead or Senior)

Boeing·USA - El Segundo, CA +1

1mo ago

ASIC / FPGA Design Verification Engineer – (Lead or Senior)

Boeing·USA - El Segundo, CA +1

1mo ago

Senior ASIC RTL Design Engineer

Arrow·Noida, India +2

1mo ago

ASIC / FPGA Digital Design Engineer – (Lead or Senior)

Boeing·USA - El Segundo, CA +1

1mo ago

ASIC / FPGA Digital Design Engineer – (Lead or Senior)

Boeing·USA - El Segundo, CA +1

1mo ago

Ethernet Switch ASIC Design Engineer/Sr

Qualcomm·Shanghai, CN

1mo ago

Senior ASIC Power Management Micro Architect, Chip Design

Nvidia·Yokne'am Illit, IL +1

1mo ago

Senior ASIC Power Management Micro Architect, Chip Design

Nvidia·Israel, Yokneam +1

1mo ago

ASIC RTL Design Engineer (Automotive IP/Cores) (Sr. Engr / Sr. Lead Engr)

Qualcomm·Bengaluru, KA

1mo ago

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Nvidia·Santa Clara, CA +4·Remote

1mo ago

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Nvidia·Santa Clara, CA +4·Remote

1mo ago