Hiring.Camp

Senior ASIC Design Engineer - XBAR IP

Nvidia

·

Jun 25, 2026

Location
India, Bengaluru
Workplace
Hybrid
Type
Full-time
Department
Engineering
Seniority
Senior
Source
Workday

Description

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.

What you’ll be doing:

  • Own micro-architecture and RTL development of design modules.

  • Micro-architect features to meet performance, power and area requirements.

  • Work with HW architects to define critical features.

  • Collaborate with verification teams to verify the correctness of implemented features.

  • Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.

  • Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested.

  • Work on post-silicon verification and debug.

What we need to see:

  • BS / MS or equivalent experience.

  • 5+ years of design experience.

  • Experience in RTL design of complex design units for at least two or three projects.

  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).

  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.

  • Expertise in Verilog.

Ways to stand out from the crowd:

  • Design experience in memory subsystem or network interconnect IP.

  • Good debugging and problem solving skills.

  • Scripting knowledge (Python/Perl/shell).

  • Leadership experience in leading small 2-3 member teams.

  • Good interpersonal skills and ability & desire to work as a part of a team.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

#LI-Hybrid

Skills

PythonPerlPrototyping

Similar Jobs

30

Senior ASIC Design Engineer

Atomcomputing · Boulder, CO +1 · Hybrid

Yesterday

Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Amazon

Yesterday

Sr ASIC Design Verification Engineer - Display

Qualcomm · Markham, ON,CA, CA

2 days ago

Sr Mgr/Dep Director ASIC Digital Design IP ENGINEERING

Global Foundries · USA - California - Santa Clara, United States of America

3 days ago

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Nvidia · Santa Clara, CA,US, US +1

3 days ago

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Nvidia · US, CA, Santa Clara, United States of America +1

3 days ago

Sr. ASIC Design Engineer

Hewlett Packard Enterprise (HP) · Sunnyvale, California, United States of America · Onsite

1 week ago

Sr. ASIC Design Engineer

Hewlett Packard Enterprise (HP) · Sunnyvale, California, United States of America · Onsite

1 week ago

Sr. ASIC Design Engineer

Hewlett Packard Enterprise (HP) · Sunnyvale, California, United States of America · Onsite

1 week ago

Senior ASIC Design Verification Engineer

Cisco · USA-SAN JOSE, United States of America · Onsite

1 week ago

Senior Principal ASIC Design Engineer

Asteralabs · Germany (Onsite) +1 · Onsite

1 week ago

Senior ASIC Design Engineer – Clocks IP

Nvidia · Santa Clara, CA,US, US +1

1 week ago

Senior ASIC Design Engineer – Clocks IP

Nvidia · US, CA, Santa Clara, United States of America +1

1 week ago

Senior Engineer, Physical Design Engineering (ASIC)

Analogdevices · US, NJ, Somerset, United States of America +1

2 weeks ago

Sr. ASIC Design Engineer, Blink/Ring ASIC Team

Amazon

2 weeks ago

Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm · Markham, ON,CA, CA

2 weeks ago

Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)

Qualcomm · Markham, ON,CA, CA

2 weeks ago

Senior ASIC Design Engineer

HP · Vancouver, WA,US, US

2 weeks ago

Senior ASIC Design Engineer

Hp · WAV01 - Vancouver, Washington, US, United States of America

2 weeks ago

Senior ASIC Design Engineer

Hp · WAV01 - Vancouver, Washington, US, United States of America

2 weeks ago

Senior ASIC/FPGA Design Engineer

RTX · US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDG, United States of America · Onsite

2 weeks ago

Senior ASIC Digital Design Engineer

Gdms · Annapolis Junction, MD, US +4 · Remote

2 weeks ago

Senior Digital ASIC Design Engineer

Bnl · Upton, NY, United States of America

2 weeks ago

Senior ASIC Physical Design Engineer, Netlisting

Nvidia · Santa Clara, CA,US, US +1

3 weeks ago

Senior ASIC Physical Design Engineer, Netlisting

Nvidia · US, CA, Santa Clara, United States of America +1

3 weeks ago

ASIC Senior Principal Engineer : Design Veirifcation

Hewlett Packard Enterprise (HP) · Bengaluru, Karnātaka, India · Onsite

3 weeks ago

ASIC Senior Principal Engineer : Design Veirifcation

Hewlett Packard Enterprise (HP) · Bengaluru, Karnātaka, India · Onsite

3 weeks ago

ASIC Senior Principal Engineer : Design Veirifcation

Hewlett Packard Enterprise (HP) · Bengaluru, Karnātaka, India · Onsite

3 weeks ago

Senior ASIC Design Engineer - GPU

Nvidia · Durham, NC,US, US +2 · Hybrid

3 weeks ago

Senior ASIC Design Engineer - GPU

Nvidia · US, NC, Durham, United States of America +2 · Hybrid

3 weeks ago
Senior ASIC Design Engineer - XBAR IP at Nvidia | Hiring.Camp