STCO Methodology & Framework Technologist, up to Staff

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. This role focuses on developing system‑level STCO methodologies and framework enablement, including pilot platforms to support early‑stage chiplet‑based optimization and trade‑off analysis. The engineer builds modular, data‑driven frameworks that integrate system KPIs, IP‑level metrics, technology data, and thermal and packaging constraints to quantify system‑level benefits beyond PPAC. Early STCO concepts are prototyped using Excel‑based models for rapid iteration and stakeholder alignment, and subsequently migrated into scalable Python‑based frameworks for broader reuse and extensibility. Experience in software development or engineering, with the ability to design and implement structured, maintainable technical frameworks. Proficiency in Python or equivalent programming languages for data modeling, analysis, and framework development. Build structured, parametric models Prototype early STCO concepts and decision flows Support pilot‑level demonstrations and cross‑team technical reviews Experience developing methodology, prototyping, or optimization tools for semiconductor technology analysis, system modeling, or architecture exploration. Ability to integrate multi‑source technical inputs, including system KPIs, IP metrics, technology node data, and packaging or thermal constraints. Working knowledge of chiplet‑based SoC architectures and 2.5D/3D integration concepts. Solid understanding of system‑level KPIs beyond PPAC, such as bandwidth, latency, thermal limits, and power integrity. Experience with early design‑space exploration, “what‑if” analysis, and quantitative trade‑off evaluation. Experience developing pilot or prototype tools that evolve into reusable engineering frameworks. Strong data analysis and interpretation skills, with the ability to clearly communicate assumptions, insights, and conclusions. Familiarity with semiconductor design enablement flows, EDA methodologies, or system‑level modeling environments. Ability to work independently in technically ambiguous problem spaces, while collaborating closely with domain experts.