Senior HSIO Bench Test Engineer

Responsibilities includes developing and executing characterization plans for High Speed Interfaces to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring up & debug to qualify designs fabricated at external foundries and performing technical data analysis of parametric performance over various operating conditions and configurations. Master's Degree in Electronics/Electrical/Computer Engineering or related field Work Experience: 3+ year of experience in related areas. Good understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed-signal and semiconductor physics. Knowledge of High Speed test and characterization including eye diagram characteristics, Receiver JTOL performance, Jitter analysis, signal integrity etc. Familiarity with SERDES Transmitter/Receiver design blocks. Hands on experience with lab equipment such as Oscilloscopes, TDRs/VNAs, J-BERT etc. Experience with Python/C# for test automation. Familiarity with Board Design concepts(Schematic reviews, Layout best practices etc) is a plus. Good ASIC device level characterization skills. System level knowledge is a plus. Strong verbal and written communications skills as well as good organization and documentation skills. Strong problem solving & debugging skills. Ability to work independently and with good initiative to overcome technical challenges. Strong Interpersonal and teamwork skills with proven ability to work effectively in a fast-paced multi-disciplinary environment. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.