CPU RTL Methodology Engineer

Define and develop methodologies to build scalable, efficient CPU designs Support RTL development and debug workflows across CPU design teams. Maintain and enhance RTL databases and repositories using GIT and other version control systems. Triage RTL issues and collaborate with design teams to resolve them efficiently. Develop and maintain automation scripts and tools (primarily in Python) to improve RTL workflows, verification, and regression systems. Interface with CAD teams to align RTL tooling with broader design infrastructure. Contribute to continuous integration and build systems for RTL environments. Document workflows, tools, and best practices for internal teams. Strong experience in RTL design (Verilog/SystemVerilog) and understanding of CPU microarchitecture. Solid knowledge of RTL databases and version control systems (GIT). Proven ability to triage RTL issues and support design/debug workflows. Advanced scripting skills in Python; familiarity with other scripting languages (TCL, Perl, Bash) is a plus. Experience with CAD tools and automation frameworks in a hardware design environment. Familiarity with CI/CD pipelines and build systems for RTL. Excellent problem-solving and communication skills. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.