Senior engineer-1

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

• Design and build complete FPGA-based SoC applications using our C++ flow — writing HLS cores, integrating them into full systems (interconnect, IPs, firmware), and running them on real hardware.
• Use these apps to drive regression/validation testing (functional correctness, performance, QoR, timing).
• Act as an internal "customer zero," feeding hands-on findings into feature prioritization and roadmap decisions alongside the compiler teams.

Requirements/Qualifications:

• Firmware/embedded C++ development (drivers, RTOS/bare-metal, DMA/interrupts); high-level synthesis as a user (Vitis HLS, Catapult, SmartHLS, or similar — pragmas, pipelining, QoR analysis);
• FPGA/SoC system design (AXI, memory hierarchies, IP integration); strong general software engineering (C++); and a test/quality mindset for complex toolchains.
• communicate well, thrive with ambiguity, and are excited about the future of C++-based hardware/software co-design.
• Xilinx/ AMD Vitis flow experience, SDK and boot gen flows
• Expertise to build Embedded FPGA application and validate on Silicon
• Testing Linux and Standalone Device Drivers
• Overall 8+ years of experience in same domain.

Travel Time:

0% - 25%

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