Layout Engineer, DEG
Micron Technology
·Yesterday
- Location
- Boise, ID,US, US
- Type
- Full-time
- Department
- Engineering
- Seniority
- Mid
- Experience
- 2+ years
- Education
- Bachelor
- Source
- Eightfold
Description
Req ID:
JR116620 Layout Engineer, DEG
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Our layout engineering team drives the physical design foundations behind Micron’s industry‑leading memory technologies. We work closely across global design, CAD, and verification groups, solving sophisticated challenges and enabling the performance and scalability our products rely on!
We’re looking for a Layout Engineer who enjoys hands‑on design work and close collaboration. In this role, you’ll shape block‑level layouts, guide physical design strategy, and directly influence the quality and reliability of our DRAM products. Your work will have a meaningful impact across teams and generations of technology.
## Responsibilities
Build analog block-level layouts in Cadence Virtuoso, including floorplanning, placement, routing, and optimization.
Apply layout methods and physical constraints such as PDN, pin placement, routing blockages, and hierarchy.
Ensure DRC, LVS, density, and reliability compliance.
Support parasitic extraction, post-layout verification, and ECO activities.
Build partial custom layouts for selected device-level or small analog blocks.
## Minimum Qualifications
Bachelor's degree in EE, Physics, CE, or comparable degree, and 2+ years of hands-on analog layout experience.
Experience performing physical layout using Cadence Virtuoso or similar tools.
Familiarity with DRC, LVS, physical verification, and reliability checks.
Ability to plan, document, and review layout goals with cross-site teams.
## Preferred Qualifications
Good understanding of Circuit Design principles and ability to come up with a high-performance layout that are optimal in area.
Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
Excellent command and problem-solving skills in over Physical layout verification.
Scripting and automation experience is good to have but not mandatory.
Experience of using AI agentic to generate layout is a plus
Strong communication skills supporting global engineering teams.
Job Profile(s):
Layout/Mask Designer E2
Relocation Level: TBD
Before Getting Started
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As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc
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