- Location
- Hsinchu, Hsinchu City,TW, TW
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Source
- Eightfold
Description
As part of a Package Layout team, you will collaborate to implement high speed and PDN design for ASIC packages. Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using APD or SiP tools. Optimize package pin out incorporating system level trade-offs of pins assignment. Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations. In close co-operation with the SI/PI/HW design teams and product teams Planning, ensuring stakeholder management and leading projects from start to finish Experience in substrate layout of wire bond and flip chip packages, preferred
Skills
.NETSalesforce
