Hiring.Camp

Senior Engineer/ Engineer – Package Silicon Integration Engineer

Micron Technology

·

Sep 2, 2026

Location
Hyderabad, TS,IN, IN
Type
Full-time
Department
Engineering
Seniority
Senior
Education
PhD
Source
Eightfold

Description

Req. ID:

JR105690 Senior Engineer/ Engineer – Package Silicon Integration Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Roles & responsibilities can include but are not limited to:

  • Technology Integration
  • Understand silicon and package technology roadmaps across market segments and identify integration solutions that address business needs.
  • Develop and execute plans to integrate new silicon technologies with new package platforms for memory applications, with a focus on identifying and resolving CPI issues.
  • Guide technology development through various maturity phases, supporting Micron's goals of technology leadership and manufacturing excellence.
  • Virtual Prototyping & Simulation Support
  • Contribute to virtual prototyping and artificial intelligence workflows that evaluate new materials, structures, and integration schemes before committing to physical builds — reducing time-to-learning and build costs.
  • Apply or develop working knowledge of multi-physics simulation (mechanical, thermal, or electrical) to support CPI risk assessment and integration decisions.
  • Use virtual prototyping insights to inform test vehicle scope, helping to down-select build options and focus empirical effort on highest-risk scenarios.
  • Correlate simulation outputs with physical characterization, package build data, and reliability results to improve predictive confidence — with support from dedicated simulation specialists where needed.
  • Characterization & Qualification
  • Define mechanical characterization architectures that efficiently capture CPI behaviors and validate integration assumptions across technology nodes in collaboration with silicon, package, and lab subject matter experts for characterization of critical integration parameters.
  • Plan and execute Design of Experiments (DOEs) informed by both simulation predictions and test vehicle results to efficiently validate integration approaches.
  • Characterize enabling technologies across thermal, mechanical, electrical, and reliability dimensions and document best-known processes (BKMs) and transition validated learnings into manufacturing-ready processes and design rules.
  • Hand-off validated material selections, process guidelines, and design rules to manufacturing teams in a structured and repeatable manner.
  • Design Rule Development
  • Collaborate with silicon and package developers to identify solutions and implement design rules informed by both empirical and simulation-based insights.
  • Contribute to stack-up guidance and layout recommendations that improve reliability and manufacturability.
  • Translate learnings from characterizations and virtual prototypes into actionable design guidelines for silicon and package design teams.
  • Cross-Functional Collaboration
  • Partner with global R&D (Research & Development), wafer fabs, and manufacturing packaging teams to resolve integration challenges and improve yield, quality, and manufacturability.
  • Support root cause analysis efforts by combining physical failure analysis with test vehicle data and available simulation insights.
  • Engage with silicon design, package design, and test teams to align test vehicle objectives and virtual prototyping priorities with program needs.
  • Roadmap Alignment
  • Stay aligned with evolving silicon and package technology roadmaps (e.g., 3DS, HBM, advanced node scaling) to anticipate integration challenges and plan accordingly.
  • Identify gaps in test methodology coverage and virtual prototyping capabilities to support next-generation technology enablement.

Mandatory Requirements:

  • Understanding of IC package development with exposure to CPI concepts, test vehicle development, front-end fab processes, or BEOL integration.
  • Ability to define and execute test vehicle strategies that efficiently characterize integration behaviors and accelerate technology maturity.
  • Familiarity with virtual prototyping concepts and the use of simulation to reduce physical build dependency is a strong plus.
  • Familiarity with at least one simulation or modeling domain is advantageous but not required:
  • Mechanical stress / thermo-mechanical analysis (FEA)
  • Thermal simulation
  • Electrical / signal integrity / power integrity modeling
  • Background in fab metallization, BEOL (Back End of Line) integration, or front-end fab interactions is preferred.
  • Ability in translating test vehicle and simulation data into DOE decisions and design rules.
  • Experience with cross-functional project coordination and technical collaboration across global teams.
  • Strong analytical and problem-solving skills with the ability to translate data into actionable integration decisions.
  • Strong interpersonal, oral, and written English communication skills.

Additional/Preferred Qualifications:

  • Experience with AI/ML tools for data visualization/automation.
  • Knowledge of semiconductor fabrication, assembly & test processes.

Education Qualifications:

  • M.S. or Ph.D. in Electrical Engineering, Mechanical Engineering, Materials Science, Physics, or Microelectronics with less than 2 years’ experience is preferred
  • Ph.D. is strongly preferred but not required; relevant hands-on industry experience will be equally considered.

Job Profile(s):

Semiconductor Design Engineer 3

Relocation level: (TBD)

Before Getting Started

Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that:

  • Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.
  • If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.

​​​​

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Skills

Prototyping

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