CPU Software Architecture Sr. Staff Engineer

Design and development of firmware of boot, debug, idle and active CPU power management CPU software/hardware design trade-offs Coordinating debugging of critical SW issues that are artifacts of any high-performance CPU microarchitecture (prefetching, speculation, memory ordering etc...) Definition of short and long-term SW architecture roadmap in accordance with Arm's architecture ISA evolution Represent the CPU SW teams in engagements with Arm/ RISC-V architects and third-party software partners (e.g., Google, MSFT, RISE etc.) Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc. 15+ Years of Experience in the embedded domain to design, develop and support software solutions on multi-core CPUs with Strong C/C++ programming skills. Very deep expertise in the subject of computer architecture especially in more than one of the following areas - Memory consistency, Coherency, Memory Management, Virtualization, Security/ Sandboxing, Super Scalar Architectures Good understanding of system wide bottlenecks that may influence CPU performance/ throughput. Very good exposure to ARM or RISC-V architectures. Embedded Platforms experience including low-level drivers and firmware, kernel, and user-space components. Design and development of software for heterogeneous compute platforms consisting of ARM or RISC-V CPUs and specialized hardware accelerators in an embedded SoC systems. Usage of J-TAG or ICE debuggers Experience in real-time SW development for embedded products. Hands on experience of driver development on any RTOS . Detailed understanding of some of SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC, PLIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS). Motivated self-starter with excellent verbal and written communication skills, demonstrated ability to work with engineers/partners/customers across different geographies. Demonstrated experience working with senior management in a corporate environment. Demonstrated experience in business process streamlining and transformation that includes disciplined approach to digitized services enabling. Hands-on technical lead who is not hesitant to dig into the details where needed to get first-hand knowledge of the issues and play an active and personal role in steering team success.