Manager Systems Design and Architecture

Req ID:

JR103421 Manager Systems Design and Architecture

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As the Manager of the Architecture and Hardware team in Micron’s Storage and Memory Systems (SMS) group within TPG Pathfinding, you will lead a multidisciplinary team of engineers responsible for system-level architecture, hardware prototyping, and applied research for next-generation memory and storage technologies. Your team’s mission is to innovate, model, architect, and prototype system platforms that quantify the performance, power, and cost benefits of Micron memory and storage technologies—enabling confident roadmap decisions for product groups and business units. You will collaborate closely with other pathfinding teams as well as with product groups and external partners to accelerate innovative adoption of Micron memory and storage across AI architectures and software platforms. This role combines people management, technical leadership, external collaboration, and program execution across advanced memory storage systems, AI infrastructure, and hardware-accelerated prototypes.

# Responsibilities

• Lead system-level architecture evaluation, prototyping, and pathfinding for advanced memory and storage technologies (CXL, DDR/LPDDR, HBM, NVMe, emerging/disaggregated memory), including FPGA-based controller emulation and AI infrastructure prototypes. Define requirements, success metrics, and experimental methodologies for performance, cost, power, and scalability tradeoffs. Perform architecture impact analysis in response to competitive threats.
• Partner with Software and Applications Modeling teams to connect architectural concepts to real AI workloads and foster cross-team collaboration within SMS and across TPG product groups.
• Own technical execution for multi-year internal and externally funded programs, including milestones, deliverables, and reviews. Oversee system procurement, integration, lab bring-up, validation, and operational readiness.
• Engage with internal and external partners, vendors, research organizations, and industry standards bodies. Support executive-level briefings, roadmap discussions, and team strategy sessions.
• Manage, mentor, and develop a team of senior engineers across hardware, systems architecture, RTL/FPGA, board design, and system validation. Strategically grow team capabilities in AI system architecture, memory and I/O protocols, performance/power/TCO modeling, and advanced packaging and interconnect system impact.
• Own resource planning, staffing allocation, budgets, and purchase approvals. Ensure lab safety, compliance, and operational continuity.

# Minimum Qualifications

• Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field (Master’s or PhD preferred) and 10+ years of experience in systems architecture, hardware design, storage, memory, or AI infrastructure.
• Proven experience leading and managing senior technical teams and complex engineering programs, preferably in a pathfinding or advanced R&D organization.
• Deep understanding of memory hierarchies, storage systems, and system-level performance analysis, with technologies such as HBM, DDR/LPDDR, SSDs and NAND.
• Working Knowledge of AI compute and storage system architectures, including xPU (GPU, CPU, DPU, accelerator) memory-storage hierarchy interactions.
• Strong written and verbal communication skills, including executive-level technical presentations.
• Ability to work effectively in an environment with significant ambiguity and rapidly evolving priorities.

# Preferred Qualifications

• Experience with FPGA-based prototyping, hardware emulation, RTL/Verification flows, board-level development, electrical debug, and lab bring-up.
• Experience with system-level performance modeling (bandwidth, latency, queueing, utilization, trace-based analysis), power/energy/TCO modeling, advanced packaging and interconnect technology evaluation.
• Experience with government-funded research programs or national laboratories, and active participation in industry standards bodies (JEDEC, UCIe, SNIA, NVMe, PCI-SIG, etc.), with a demonstrated ability to bridge research, engineering, and product strategy.
• Experience integrating AI tools into engineering workflows to improve team productivity.

Job Profile(s):

Systems Design Engineer Manager 2

Relocation Level: TBD

Before Getting Started

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As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

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