- Location
- SHANGHAI 07, China
- Type
- Full-time
- Department
- Engineering
- Seniority
- Lead
- Source
- Workday
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The ideal candidate will collaborate closely with design and verification teams to ensure comprehensive test coverage, robust verification methodology, and seamless project execution. Will play a key role in bridging communication between local teams and global stakeholders. Hands-on experience in any protocol like AMBA, PCIe, USB, MIPI or DDR/LPDDR. ARM/RISC-V Processor integration experience preferred.
