SoC HW Systems Engineer — Packaging & IO

Our Automotive Microcontroller R&D team

is looking for an experienced SoC HW Systems Engineer to join the Chip-Level

Architecture team and own the package, ballout, and IO interface strategy for

our next-generation automotive microcontroller platform. Your role Key responsibilities in your new role · Own the package selection

strategy, ballout architecture, and IO ring planning for our next-generation uC

platform. · Analyze and consolidate

customer PCB design constraints and system-level integration requirements to

drive chip-level packaging decisions. · Review and maintain the

platform ballout map, providing technical feedback across stakeholder teams

including implementation, PHY vendors, and customers. · Drive the datasheet content for

IO electrical parameters and system-level interface specifications in

collaboration with IP teams and customers. · Verify PHY and PMIC

compatibility with the platform through model-based simulation and parasitic

analysis. · Assess package performance vs.

cost tradeoffs and maintain the holistic picture of package constraints versus

customer system needs across the full product family. · Maintain technical

documentation in compliance with ISO 26262 requirements. Your profile Qualifications and skills to help you succeed  · Bachelor's or Master's degree

in Electrical Engineering or related field. · At least 7 years of industry

experience in semiconductor product development with a background in analog

design, package engineering, or SoC system-level design. · Good knowledge of package types

(LFBGA, TFBGA, QFP) and package parasitic modeling. · Experience with PCB

system-level design constraints and customer board integration requirements. · Understanding of IO ring

architecture — pad types, ESD protection strategies, IO power domains. · Familiarity with ballout

planning, signal grouping principles, and PCB routing constraints for

automotive microcontrollers. · Familiarity with ISO 26262

documentation standards. · Pro-active collaborative

attitude with strong communication skills in a global multi-cultural team. · Fluent English required; German

is a plus. You

are best equipped for this task if you have: · Experience reviewing package

roadmaps and translating customer system constraints into chip-level package

and ballout requirements. · Hands-on experience with signal

integrity simulation at package level and model-based PHY/PMIC compatibility

verification. · Contributed to ballout map

creation, reviewed platform ballout with stakeholders, and managed feedback

cycles with package vendors. · Worked on datasheet electrical

parameter content for IO and system-level interface specifications. · Experience driving BOM analysis

for the full system solution around the microcontroller. #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.  Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.