Design Verification Architect (Sr staff or above)

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Drive testbench architecture and development to verify complex interconnect and subsystem designs while working with the wider engineering team Ensure a scalable, reusable DV environment is built and deployable across different tiers of products Work with all stakeholders to ensure program success Bachelor's or Master's degree in Engineering, Electronics, Information Systems, Computer Science, or a related field 12+ years of hardware engineering experience or related work experience Strong debugging skills; experience with UVM, SystemVerilog, and UPF Understanding of specifications and standards, and development of relevant test plans Experience with monitors, scoreboards, sequencers, and sequences that utilize scripts, SystemVerilog, UVM, and methodologies to increase the rate at which bugs are found and resolved Post-silicon bring-up and HW-SW debug experience is a plus; knowledge and exposure to silicon debug toolchains is an added advantage Thorough understanding of digital design concepts Thorough understanding of DV and power DV methodologies and tools Good understanding of ARM CPU architecture and ARM-based SoC architecture Understanding of bus protocols such as AHB, AXI, ACE, ACE-Lite, and CHI Understanding of multi-core ARMv8 CPU architecture, coherency protocols, and virtualization Bachelor's degree in Engineering, Electronics, Information Systems, Computer Science, or a related field