Hiring.Camp

Senior Staff / Principal Engineer – SoC Physical Design

Qualcomm

·

Yesterday

Location
Bengaluru, KA,IN, IN
Type
Full-time
Department
Engineering
Seniority
Senior
Education
PhD
Source
Eightfold

Description

##

Company:

Qualcomm India Private Limited

## Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Experience: 15+ Years

Location: Bangalore

Job Responsibilities:

  • Lead end-to-end physical design implementation for large-scale SoCs and complex subsystems, driving projects from architecture definition to successful tapeout.
  • Own full-chip and subsystem physical design strategy including Floorplanning, Power Planning (PDN), Placement, CTS, Routing, Timing Closure, Signal Integrity, and Physical Verification.
  • Drive PPA (Performance, Power, Area) optimization and signoff closure across advanced process nodes.
  • Define and enhance physical design methodologies, automation flows, and best practices to improve design efficiency and quality.
  • Lead cross-functional collaboration with Architecture, RTL, STA, DFT, Package, CAD, Technology, and Product Engineering teams to achieve aggressive silicon schedules.
  • Resolve complex design challenges involving timing convergence, congestion, IR/EM, noise, reliability, and manufacturability.
  • Provide technical leadership during tapeout planning and execution, ensuring high-quality silicon delivery.
  • Mentor and guide junior engineers, driving technical excellence across the organization.
  • Influence future design methodologies and contribute to strategic technology roadmap decisions.

Required Skills

  • 15+ years of hands-on experience in ASIC/SoC Physical Design with proven success across multiple tapeouts.
  • Deep expertise in Floorplanning, Power Delivery Networks, Placement, CTS, Routing, Timing Closure, Signal Integrity, IR/EM Analysis, and Physical Verification.
  • Strong understanding of advanced signoff methodologies including STA, SI, Power Integrity, Reliability, DRC/LVS, ERC, PERC, and ESD verification.
  • Extensive experience with industry-standard EDA tools such as Innovus, ICC2/Fusion Compiler, PrimeTime, Tempus, Calibre, RedHawk, Voltus, and related signoff tools.
  • Proven experience leading physical design execution on advanced technology nodes (5nm, 3nm, or equivalent).
  • Strong expertise in low-power design methodologies, power-aware implementation, and multi-voltage designs.
  • Demonstrated ability to drive technical decisions, solve complex design challenges, and influence cross-functional teams.
  • Excellent leadership, communication, and stakeholder management skills.

Preferred Qualifications:

  • Experience in high-performance CPU, GPU, AI/ML, Mobile, Networking, Datacenter, or Multimedia SoCs.
  • Demonstrated ownership of full-chip physical design and successful delivery of complex SoCs to production.
  • Experience driving methodology development, flow automation, and design productivity improvements.
  • Prior experience leading and mentoring teams of Physical Design engineers.
  • Candidates from leading semiconductor product companies are strongly preferred.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

If you would like more information about this role, please contact Qualcomm Careers.

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