PCIe Validation Engineer

Etched

Apr 22, 2026

Apply

Salary: $500+
Location: San Jose
Workplace: Onsite
Type: Full-time
Department: ASIC

Skills

PythonLinuxCompliance

Similar Jobs

Engineer, PCIe Validation

Tenstorrent · Vancouver, British Columbia, Canada · Onsite

1+ year ago

SSD Qualification Engineer - PCIe Validation

Purestorage · Santa Clara, California +1 · Onsite

2 weeks ago

SSD Qualification Engineer - PCIe Validation

Purestorage · Santa Clara, California +1 · Onsite

2 months ago

PCIE Design Validation Engineer

Altera · Penang 15, Penang, Malaysia

3 months ago

Principal PCIe Silicon Validation Engineer

Asteralabs · San Jose, CA +1

5 months ago

Senior PCIe Post-Silicon Validation Engineer

Nvidia · Santa Clara, CA,US, US

6 months ago

Senior ASIC Digital Engineer (ASIC SOC Validation with PCIe protocol experience) from 5 to 7 years

SanDisk · Bengaluru, KA, India · Hybrid

4 days ago

Senior Firmware Verification Engineer (Python based scripting - PCIe Protocol Feature Validation) - 5-8 Years

SanDisk · Bengaluru, KA, India

1 week ago

Technologist Engineer, ASIC Development Engineering (SoC Validation Lead, PCIe Protocol Expertise)

SanDisk · Bengaluru, KA, India

1 month ago

Staff Engineer, ASIC development Engineering (ASIC SOC Validation with PCIe protocol experience) from 5 to 7 years

SanDisk · Bengaluru, KA, India · Hybrid

3 weeks ago

Staff Engineer, ASIC development Engineering (ASIC SOC Validation with PCIe protocol experience) from 5 to 7 years

SanDisk · Bengaluru, KA, India · Hybrid

1 month ago

Staff Engineer, System Design Verification ( NVME / PCIe/ MI ) SSD Validation ( 5- 8 Years) , Bangalore

SanDisk · Bengaluru, KA, India

3 months ago

Staff ASIC Digital Engineer (ASIC SoC Validation with protocol experience in DDR, PCIe) with 8 to 12 years

SanDisk · Bengaluru, KA, India

4 days ago

Senior Staff Software Engineer-PHY layer concepts (e.g., SERDES, USB, PCIe, Ethernet) / Validation Infrastructure

Marvell · US-CA - Santa Clara, United States of America

2 months ago

Principal Engineer, ASIC Development Engineering (ASIC SoC Validation with protocol experience in DDR, PCIe) with 8 to 12 years

SanDisk · Bengaluru, KA, India

2 weeks ago

Principal Engineer, ASIC Development Engineering (ASIC SoC Validation with protocol experience in DDR, PCIe) with 8 to 12 years

SanDisk · Bengaluru, KA, India

1 month ago

Staff Software Engineer - PHY layer concepts (e.g., SERDES, USB, PCIe, Ethernet) and validation workflows.

Marvell · US-CA - Santa Clara, United States of America

2 months ago