This job is no longer accepting applications. Similar open roles are listed below.
Logic Design Engineer
Paragon Energy Solutions
·Aug 20, 2025
- Location
- Fort Worth, TX · Cranberry Township, PA · New Strawn, KS · Home Office
- Department
- Technical Profs
ILogic Design Engineer
Intel·MYS - Penang, Malaysia·Onsite
ILogic Design Engineer
Intel·MYS - Penang, Malaysia·Onsite
PELogic Design Engineer
Paragon Energy Solutions·Fort Worth, Texas
CLogic Design Engineer
Cisco·Israel +1·Hybrid
IStaff Logic Design Engineer
Intel·MYS - Penang, Malaysia·Onsite
IStaff Logic Design Engineer
Intel·MYS - Penang, Malaysia·Onsite
IDFT Engineer / GPU Logic Design Engineer
Intel·SRR4 - SRR4 - Sarjapur 4, India·Hybrid
IDFT Engineer / GPU Logic Design Engineer
Intel·SRR4 - SRR4 - Sarjapur 4, India·Hybrid
ISoC Logic Design Engineer
Intel·CRI - Belen, Heredia
IStaff Logic Design Engineer
Intel·MYS - Penang, Malaysia
IStaff Logic Design Engineer
Intel·MYS - Penang, Malaysia
IGPU Senior Logic Design Engineer
Intel·SRR4 - SRR4 - Sarjapur 4, India
IGPU Senior Logic Design Engineer
Intel·SRR4 - SRR4 - Sarjapur 4, India
APrincipal Logic Design Engineer
Asteralabs·Bengaluru, Karnataka +1
IGPU Logic Design Engineer
Intel·Folsom, California +1
$106K – $200K IGPU Logic Design Engineer
Intel·Folsom, California +1
$106K – $200K AIP Logic Design Engineer
Altera·Bengaluru, Karnataka
ALPrincipal Logic Design Engineer - UALink IP/Subsystem
Astera Labs·Bengaluru, Karnataka +1
ALLead Logic Design - PCIE IP/Subsystem Engineer
Astera Labs·Bengaluru, Karnataka +1
ISenior CPU Logic Design Engineer
Intel·ISR - Haifa, Israel
ISenior CPU Logic Design Engineer
Intel·ISR - Haifa, Israel
ISenior DFT Logic Design Engineer
Intel·Hillsboro, Oregon +2
$142K – $269K ISenior DFT Logic Design Engineer
Intel·Hillsboro, Oregon +2
$142K – $269K ALead Logic Design for UALink IP/Subsystem Engineer
Asteralabs·Bengaluru, Karnataka +1
SIP Logic Design Engineer
Solidigm·Rancho Cordova, California·Hybrid
$105K – $165K/yr SH3D Stacked DRAM-on-Logic Design Engineer
SK hynix America·San Jose, California·Onsite
$10K QAI/ML Logic Design Engineer-Senior
Qualcomm·Austin, Texas
$127K – $191K IPrincipal Engineer, Mixed Signal Logic Design Engineer
Intel·San Jose, California +1
$221K – $312K IIP Logic Design Engineer
Intel·Santa Clara, California +1
$106K – $173K IMixed Signal Logic Design Engineer
Intel·MYS - Penang, Malaysia·Hybrid, Onsite