Hiring.Camp

Senior Power Integrity Engineer - LPU Packaging

Nvidia

·

Mar 11, 2026

Location
US, CA, Santa Clara, United States of America
Type
Full-time
Department
Engineering
Seniority
Senior
Education
PhD
Source
Workday

Description

NVIDIA is now looking for a Senior Power Integrity Engineer to join our LPU Packaging team!

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people! Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent.

What you’ll be doing:

  • Define best‑in‑class power delivery design and optimization practices from die/package through board, tray, and rack levels for the full product development cycle

  • Own the PI specification and methodology for assigned products, defining PDN targets including impedance, droop, noise, and transient response for GPU, HBM, and high‑speed SerDes

  • Architect package‑level PDNs by collaborating with design teams on bump/ball maps, via structures, and decoupling strategies for FCBGA and 25D/3D integrations

  • Drive system‑level PI design, including board‑level PDN planning, decap placement, and VRM interfaces while co-optimizing with SI, thermal, and mechanical teams

  • Perform PI extraction and simulation for advanced packages and develop integrated chip–package–board co‑simulation flows using industry-standard tools

  • Generate and deploy reusable PI models, such as SPICE, S-parameter, and IBIS-AMI, for use by internal and external partners

  • Define and execute comprehensive lab validation plans to correlate measured impedance, noise, and droop against simulation data and specifications

  • Debug complex system‑level issues including rail noise, jitter‑induced errors, resets, and margin loss during hardware testing and validation

What we need to see:

  • MS or PhD in Electrical Engineering or a related field, or equivalent experience

  • 12+ years of relevant work experience in Power Integrity

  • A strong background in power integrity for high-current, low-voltage rails within large GPUs, ASICs, or CPUs

  • Proven ownership of the chip-package-board PDN design and sign-off process

  • Hands-on experience with FCBGA, 25D/3D integration, HBM, or similar high-power, high-pin-count packages

  • Direct experience in the co-design of bump/ball maps, power/ground planes, and decoupling capacitor networks

  • Proficiency with frequency-domain PDN impedance analysis and time-domain transient/droop simulation tools (eg, PowerSI, PowerDC, Sigrity, RedHawk, Totem, HFSS, SIwave, ADS, or SPICE)

  • A deep understanding of board-level PDN design, including stack-up definition, plane partitioning, and VRM placement on high-layer-count accelerator boards

  • Experience in executing lab measurements using VNAs, oscilloscopes, and PDN analyzers to correlate measured noise and droop to original specifications

Ways to stand out from the crowd:

  • Demonstrated leadership of end-to-end PI for a major GPU, CPU, or ASIC program from initial concept through mass production

  • Experience with data center or cloud hardware, specifically regarding rack-level power distribution and how PI choices impact performance headroom

  • Background in co-designing SI and PI for high-speed interfaces like PCIe, NVLink, CXL, or Ethernet SerDes to mitigate jitter and noise coupling

  • Strong communication skills with the ability to clearly explain complex PDN trade-offs and risks to both technical teams and program stakeholders

With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology industry's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working with us and our product lines are growing fast in some of the hottest state of the art fields such as Artificial Intelligence, Deep Learning, Autonomous Vehicles, and Robotics. We have a real passion for perfection and for building products that excite the imagination. If you share these values and have the experience and skills to participate, we would love to have you join our team.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until March 15, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Skills

Deep Learning

Similar Jobs

30

Signal and Power Integrity Senior Application Engineer

Cadence Design · SAN JOSE 09, United States of America · Onsite

4 days ago

Senior Power Integrity Co-Design Engineer

Nvidia · US, CA, Santa Clara, United States of America

3 weeks ago

Senior Power Integrity Co-Design Engineer

Nvidia · Santa Clara, CA,US, US

3 weeks ago

Senior Power Integrity Engineer - LPU Packaging

Nvidia · Taiwan, Hsinchu +1

1 month ago

Senior Power Integrity Engineer - LPU Packaging

Nvidia · Hsinchu, Hsinchu City,TW, TW +1

1 month ago

Senior Power Integrity Engineer

Drivenets · Ra'anana, IL · Hybrid

1 month ago

Power Integrity Senior Engineer

Qualcomm · Bengaluru, KA,IN, IN

1 month ago

Senior Power Integrity Methodology CAD Engineer

Nvidia · US, CA, Santa Clara, United States of America +1

1 month ago

Senior Power Integrity Co-Design Engineer

Nvidia · US, CA, Santa Clara, United States of America

2 months ago

Senior Power Integrity Co-Design Engineer

Nvidia · Santa Clara, CA,US, US

2 months ago

Senior Power Integrity Methodology CAD Engineer

Nvidia · Santa Clara, CA,US, US +1

2 months ago

Senior Signal & Power Integrity Engineer

Nvidia · Israel, Yokneam +3

1 week ago

Senior Signal & Power Integrity Engineer

Nvidia · Yokne'am Illit, North District,IL, IL +3

1 week ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Roseville, CA, United States

1 week ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Santa Clara, CA, United States

1 month ago

Signal and Power Integrity Engineer, Senior (IoT)

Qualcomm · Hsinchu, Hsinchu City,TW, TW

1 month ago

Package Development, Signal Integrity and Power Integrity Engineer, Senior Staff

Marvell · US-TX - Austin, United States of America

2 months ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Santa Clara, CA, United States

2 months ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Santa Clara, CA, United States

2 months ago

Senior Signal/Power Integrity Hardware Engineer (Onsite)

Cisco · USA-SAN JOSE, United States of America · Onsite

3 months ago

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Santa Clara, CA, United States

3 months ago

Package Development, Signal Integrity and Power Integrity Engineer, Senior Principal

Marvell · US-CA - Santa Clara, United States of America

4 months ago

Senior Signal and Power Integrity Engineer - Hardware

Nvidia · US, CA, Santa Clara, United States of America

4 days ago

Package Development, Signal Integrity and Power Integrity Staff to Senior Staff Engineer

Marvell · IN - Bangalore, India

1 month ago

Senior Signal and Power Integrity Engineer

Nvidia · Taiwan, Taipei +1

1 month ago

Senior Signal and Power Integrity Engineer

Nvidia · Taipei City,TW, TW +1

1 month ago

Senior Signal and Power Integrity Engineer

Nvidia · US, CA, Santa Clara, United States of America

2 months ago

Senior Optical Signal Integrity / Power Integrity (SI/PI) Engineer

Arista Networks · Santa Clara, CA, United States

3 months ago

Design Methodology – Senior / Staff DRAM Power Integrity Engineer

Micron · Hyderabad - Phoenix Aquila, India

3 months ago

Senior Signal and Power Integrity Engineer

Cisco · IND-BANGALORE, India · Onsite

3 months ago