- Location
- HSINCHU 05, Taiwan
- Type
- Full-time
- Department
- Engineering
- Seniority
- Lead
- Closing date
- Aug 29, 2026
- Source
- Workday
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsible for the development of Pegasus, our next-generation massively parallel DRC (Design Rule Check) product.
Performs as individual contributor on case analysis, problem solving, validation and documentation.
Working closely with PE and QPV for the DRC/FILL deck developing and QC pattern generation.