New College Grad - Mixed Signal Design Engineer, HBM

Req ID:

JR93217 New College Grad - Mixed Signal Design Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Join Micron’s Memory Systems Engineering team and contribute to the development of premier digital and mixed-signal foundations for our high-bandwidth memory (HBM) products. This position offers an outstanding chance to work intimately with multiple engineering areas, guaranteeing the smooth integration and implementation of HBM base die. Join a motivated team committed to delivering robust first-pass silicon that meets our strict bandwidth, latency, power, and reliability objectives!

## Responsibilities

• Assist in defining and carrying out digital micro-architecture for HBM base-die subsystems, covering channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance counters, and reliability features.
• Translate system requirements into timing, power, and area considerations by partnering with physical layer and system architects, and help maintain interface specifications for bus protocols, clock-domain crossings, and reset strategies.
• Implement and integrate synthesizable SystemVerilog RTL, including multi-channel logic, interrupts, events, register maps, scan hooks, and design-for-test interfaces, while supporting clean integration and ECO flows.
• Collaborate with design verification teams to support verification planning, coverage goals, CDC/RDC checks, and debugging of RTL, testbench, and gate-level issues.
• Support silicon bring-up and post-silicon validation through debug enablement, issue correlation to RTL or architecture, and collaboration with DFT and test teams.

## Minimum Qualifications

• Bachelor’s degree or equivalent experience in Electrical Engineering or Computer Engineering.
• Experience with digital build or SoC integration through academic projects, internships, or early-career industry roles.
• Knowledge of SystemVerilog RTL build, clock and reset architecture, CDC/RDC methodologies, and low-power design concepts.
• Strong grasp of design-for-debug and design-for-test principles along with experience working alongside multiple engineering groups.

## Preferred Qualifications

• Exposure to post-silicon validation, silicon bring-up, or structured debug workflows.
• Experience or familiarity with scan, memory built-in self-test (MBIST), logic built-in self-test (LBIST), or related test and debug features.
• Experience developing or supporting verification plans and collaborating with build verification teams to achieve coverage goals.
• Curiosity about refining micro-architecture to improve timing and understanding build tradeoffs related to constraints and path intent.

Job Profile(s):

Semiconductor Design Engineer 1 - Semiconductor Design Engineer 2

Relocation Level: TBD

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