LEAD PRINCIPAL ENGINEER, ID1 ATE DE PROC

Req ID:

JR116983 LEAD PRINCIPAL ENGINEER, ID1 ATE DE PROC

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Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron Idaho Semiconductor Manufacturing (Triton) LLC

Etch process development on the latest state-of-the-art plasma etch tools, necessitating proficiency in Inductively Coupled Plasma (ICP), Capacitively Coupled Plasma (CCP), and Electron Cyclotron Resonance (ECR) technologies. Collaborate with High Volume Manufacturing (HVM) FABs to deploy advanced dry etch technologies, thereby accelerating production ramps. Engage with partners in technology development, Operational Central teams, and HVM FABs. Work with Technology Development (TD) and HVM to develop, deploy, and sustain end-to-end manufacturing excellence through robust supplier management and central operations execution. Establish global alignment across diverse organizations focusing on Commercial (cost), Efficiency, New Product Introduction (NPI) speed, and quality metrics. Influence HVM FABs on high-priority Key Performance Indicators (KPIs) critical for yield enhancement, encompassing improvements in both variability and defectivity. Position supervise the work of other engineers. Position requires 10 % international travel.

Employer will accept a Master’s degree in Materials Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 3 years of experience in the job offered or in a related occupation.

Position requires:

1\. Plasma Dry Etch Technology;

2\. Leading suppliers and establishing supplier accountability programs;

3\. Establishing manufacturing team structures, standards, and processes;

4\. Resolving yield ,defectivity and cycle time related issues related to process area;

5\. Statistical analysis using JMP;

6\. Driving Dry etch area MOR-POR gaps , PMI , SPC, and CSPEC; and

7\. Providing technical guidance to resolve complex capacity or cost reduction projects.

Job Profile(s):

Semiconductor Process Eng (Supervisory) 5

Relocation Level: TBD

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