- Location
- Hsinchu, Taiwan
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Experience
- 3+ years
- Education
- PhD
- Source
- Workday
Description
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.
Are you ready?
To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.
Job Description:
The Role:
The Algorithms and Libraries Team seeks a highly technical and performance-driven approach to develop and optimize algorithms for RISC-V hardware. The role is centered on leveraging vector processing to create high-performance libraries, deploying them to major AI/ML and DSP frameworks, and contributing to the MLIR-based compiler ecosystem.
Responsibilities:
Develop high-performance algorithms and software libraries for RISC-V machines, leveraging vector processing and SiFive's custom ISA extensions.
Deploy SiFive Kernel Libraries to open source AI/ML and DSP frameworks.
Collaborate with compiler and runtime engineers to improve compiler optimizations and integrate high-performance algorithms into our MLIR-based parallel programming framework.
Participate in codesign efforts with architects and hardware engineers, navigating tradeoffs between micro/architecture and algorithm designs, shaping products in early development stages.
Lead a cross-functional project from conception to product release.
Requirements:
Masters or PhD in computer science, applied mathematics, or a related field.
Practical background (3+ years experience) in developing and optimizing algorithms for specific microarchitectures, writing low-level C and assembly code.
Theoretical background in analysis of algorithms, linear algebra, and parallel computing.
Software design and programming experience in C/C++/Python/Jinja2/CMake for development, debugging, testing and performance analysis.
Familiarity with major ML training frameworks (e.g., TensorFlow, PyTorch) and common inference runtimes (e.g., LiteRT and the Micro version, ExecuTorch, ONNX Runtime, TVM).
Familiarity with ARM SIMD technologies (NEON/MVE/DSP extensions) is a plus.
Familiarity with parallel computing frameworks (e.g. CUDA/OpenMP) is a plus.
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in:
TaiwanAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
