- Location
- ZHUBEI 01, Taiwan
- Type
- Full-time
- Department
- Engineering
- Seniority
- Lead
- Closing date
- May 23, 2026
- Source
- Workday
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Skill Required:
Be a part of the Modus PE team in identifying new features in DFT & ATPG domains and developing product spec for implementation.
Work with R&D & PV teams with validation of said features, Development of methodologies, flows and documentation to help improve usability and quality of the tool
Collaborate with field to benchmark on customer designs towards successful deployment
Work with R&D teams to drive and influence the development of new tools, as well as the modification of existing tools to address the needs of customers and market.
Support existing Innovus hierarchical partition tools and top-level timing closure flow.
Support benchmarks and solve complex customer hierarchical issues.
3 years+ of experience in DFT
Educational Qualification:
B.E/ME in EE/ECE/CS
