Senior Mixed Signal Design Validation Engineer

Lead and drive the creation of validation test plan and test scripts for DDR I/O associated with LPDDR, GDDR, and HBM memory interfaces, ensuring all necessary required analog and digital circuits are covered. Conduct thorough characterization of analog, digital, and mixed-signal circuit blocks under varying conditions (process, voltage, temperature) and correlate results with simulations. Drive system-level validation for memory interfaces, ensuring high-speed performance and quality metrics meet the demanding standards required by our GPU and AI systems. Investigation validating Memory I/O circuit to understand circuit weakness paving ways circuit improvement, architecture enhancement in future products. Lead debugging efforts and design creative solutions to resolve unexpected bugs. Validate silicon performance, quality, and margins for refinement of memory interface designs. Develop and implement test scripts to optimize DDR I/O circuit, sub-circuits and overall system performance Work closely with multi-functional teams, including Mixed signal design, PISI team, hardware, firmware, and Memory qualification engineer, to resolve issues and improve the performance for memory interfaces. Develop and implement tools and scripts to enhance electrical characterization and chip bring-up processes. Mentor and train new engineers on validation practices, encouraging a culture of excellence and continuous improvement. Experience with lab instrumentation, such as oscilloscopes, logic analyzers, spectrum analyzer, TDR, phase noise analyzer, signal generators and BER tester. Ability to work in a fast-paced, dynamic environment that involves multiple-chip bring-ups and system validations.