Hiring.Camp

Senior Mixed Signal Circuit Design Engineer

Nvidia

·

Jul 1, 2026

Location
Hsinchu, Hsinchu City,TW, TW · Taipei City,TW, TW
Type
Full-time
Department
Engineering
Seniority
Senior
Education
PhD
Source
Eightfold

Description

We are looking for a Senior Mixed Signal Circuit Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

  • Be part of an analog team developing high-speed chip interfaces and complex analog functions that enable our graphics processing units (GPU) and SoC products (Tegra)
  • Design state-of-the-art mixed-signal circuits in deep sub-micron CMOS technologies.
  • Work closely with physical/layout engineers to floorplan and implement physical design of these functions.
  • Support debug, characterization and support product through high-volume production.
  • If you have the dream to learn and explore new technologies and have good analytical skills, this is the ideal position for you.

What we need to see:

  • MSEE or PhD in Electrical Engineering; 5+ years analog design experience in industry
  • Proven understanding of analog circuit layout concepts in submicron CMOS technologies; With experience in silicon design flow, from schematic, layout, layout, simulation, tape-out, silicon measurements.
  • You have experience in more than one of the following areas: digital links for display interfaces (such as HDMI, LVDS, DVI, MIPI PHY, Display Port), USB, low-jitter clock synthesis using PLL techniques, IO pads, high-speed serial links, and ADC.
  • Be able to communicate in spoken and written English; Work effectively in a team, good communication skills, enthusiasm and positive energy.
  • Proficiency in scripting languages like perl, python, skill etc.; Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
  • With experience in Cadence custom circuit design tools - particularly virtuoso; Experience running and debugging DRC and LVS with verification tools

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

Skills

PythonPerlDeep Learning

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