Hiring.Camp

Senior Mixed Signal Design Engineer

Nvidia

·

Today

Location
US, CA, Santa Clara, United States of America
Type
Full-time
Department
Engineering
Seniority
Senior
Experience
6+ years
Education
Bachelor
Source
Workday

Description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary high-speed protocols, and will serve as one of the key IPs in many complex SoC.


This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.


What you'll be doing:

  • Work with analog designers to create accurate systemVerilog model of analog components such as closed-loop PLL, Rx CTLE, SAR ADC and also optics components.
  • You’ll work with system architects, digital designers to define and verify the system architecture specification and refine adaptation algorithms.
  • Help in streamlining workflows with proper scripts to increase efficiency and enables reusability
  • Be actively involve in silicon bringup, build scripts that can be used for debug, QA, characterization and ATE

What we need to see:

  • B.S. or MS degree in Electrical Engineering or equivalent experience
  • 6+ years of experience working in high-speed I/O digital design, knowledge at protocol level (SATA, PCIE, USB) preferred
  • Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling for mixed-signal blocks
  • Deep understanding of high-speed Serdes/PLL analog circuit design.
  • Proven experience with custom digital circuit design and adaptation algorithms, such as DFE, CTLE, CDR, and offset cancellation
  • Have a strong background in Perl and Python scripting
  • FPGA emulation experience is a plus

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 17, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Skills

PythonPerlDeep Learning

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