- Location
- USA-CA Irvine Alton Parkway Bldg 1, United States of America
- Type
- Full-time
- Department
- Engineering
- Seniority
- Senior
- Education
- PhD
- Closing date
- Today
- Source
- Workday
Description
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Job Description:
Design analog blocks, systems or sub-systems using a combination of behavioral modeling tools and transistor level circuit design tools. Must be capable of implementing and optimizing circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, distortion, power consumption and cost requirements. Help take responsibility for projects with teams of analog engineers. Draw or oversee the drawing of the custom physical layout of these circuits. Work with others to define circuit board components to be used with these circuits. Define requirements for internal chip interfaces between the analog and digital circuits. Review the chip package pinout / ballout and review and revise the chip package route with package layout engineers. Design and/or review the PC test board schematics used for testing the IC performance. Characterize the performance of these ICs using lab equipment. Debug performance problems found during characterization of these analog circuits. Work with automatic test engineers (ATE) to develop production tests for these circuits. Document the operation and performance of these analog circuits.
Job Requirements:
Proficiency in analog design including high speed amplifiers (up to hundreds of MHz). Proficiency in high speed comparator design. In-depth knowledge of CMOS devices. RF design knowledge is highly desirable. Proficiency in simulation techniques and tools including RF. Proficiency in system analysis of noise, linearity, power optimization. In depth knowledge of analog and RF layout techniques. Knowledge of analog and mixed signal IP design including ADCs, DACs, references, oscillators, LDOs is highly desirable. Knowledge of switched power supplies is highly desirable. Intuitive understanding and ability to optimize circuit power, area, and performance. Skill running simulations, doing layout design and performing verification and extraction. Design environment/experience with CAD tools and thorough working knowledge of Cadence design tools. System level design tools (e.g. MatLab). Transistor level design (Cadence Analog artist). Layout tools (Cadence Virtuoso) Verification/extraction. Experimental verification/ATE support. Good communication skills. Able to work in a team environment.
Experience : Bachelors and 8+ years of related experience; at this level post-graduate coursework may be desirable or Masters degree and 6+ years of related experience or PhD and 3+ years of related experience
Compensation and Benefits
The annual base salary range for this position is USD 109,700.00 To USD 175,500.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.